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786f46b262
I don't know why it is working and how, but it is working. On my Epia transition time is by default set to 100us. I'm changing it to 200us. After that I can change frequency from min (x4.0) to max (x7.5) without lockup. Many times. There is a paranoid check at a beginning of a patch. Probably dead code, but I don't have better ideas for CL10000 case at the moment. Only way to to detect broken chip seems to be looking in log for spurious interrupts. Signed-off-by: Rafal Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com> |
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| .. | ||
| cpufreq | ||
| mcheck | ||
| mtrr | ||
| amd.c | ||
| centaur.c | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| intel.c | ||
| intel_cacheinfo.c | ||
| Makefile | ||
| nexgen.c | ||
| proc.c | ||
| rise.c | ||
| transmeta.c | ||
| umc.c | ||