mirror of
https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-10-03 18:29:36 +00:00
e58ca3de64
This fixes some problems with the way the some things represented in the device tree for the Holly and Taiga boards. This means changes both to the dts files, and to the code which instantiates the tsi108 ethernet platform devices based on the device tree. - First, and most importantly, the ethernet PHYs are given with an identical 'reg' property. This reg currently encodes the accessible register used to initiate mdio interaction with the PHYs, rather than a meaningful address on the parent bus (mdio in this case), which is incorrect. Instead we give the address of these registers as 'reg' in the mdio node itself, and encode the ID of each phy in their 'reg' propertyies. - Currently the platform device constructor enables a workaround in the tsi108 ethernet driver based on the compatible property of the PHY. This is incorrect, because the workaround in question is necessary due to the board's wiring of the PHY, not the model of PHY itself. This patch alters the constructor to instead enable the workaround based on a new special property in the PHY node. - The compatible properties on a number of nodes in the device tree are insufficiently precise. In particular the PHYs give only "bcm54xx", which is broken, since there are many bcm54xx PHY models, and they have differences which matter. The mdio had a compatible property of "tsi-ethernet" identical to the ethernet MAC nodes, which doesn't make sense. The ethernet, i2c, bridge and PCI nodes were given only as "tsi-*" which is somewhat inprecise, we replace with "tsi108-*" in the case of Taiga (which has a TSI108 bridge), and "tsi109-*", "tsi108-*" in the case of Holly (which has a TSI109 bridge). - We remove some "model" properties from the ethernets on Taiga board which were neither useful nor adequately precise. - On Holly we change to using a dtc label instead of a full path to reference the MPIC node, which makes the dts a little more readable. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
191 lines
4.1 KiB
Text
191 lines
4.1 KiB
Text
/*
|
|
* MPC7448HPC2 (Taiga) board Device Tree Source
|
|
*
|
|
* Copyright 2006 Freescale Semiconductor Inc.
|
|
* 2006 Roy Zang <Roy Zang at freescale.com>.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
|
|
|
|
/ {
|
|
model = "mpc7448hpc2";
|
|
compatible = "mpc74xx";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells =<0>;
|
|
|
|
PowerPC,7448@0 {
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
d-cache-line-size = <20>; // 32 bytes
|
|
i-cache-line-size = <20>; // 32 bytes
|
|
d-cache-size = <8000>; // L1, 32K bytes
|
|
i-cache-size = <8000>; // L1, 32K bytes
|
|
timebase-frequency = <0>; // 33 MHz, from uboot
|
|
clock-frequency = <0>; // From U-Boot
|
|
bus-frequency = <0>; // From U-Boot
|
|
32-bit;
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <00000000 20000000 // DDR2 512M at 0
|
|
>;
|
|
};
|
|
|
|
tsi108@c0000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
#interrupt-cells = <2>;
|
|
device_type = "tsi108-bridge";
|
|
ranges = <00000000 c0000000 00010000>;
|
|
reg = <c0000000 00010000>;
|
|
bus-frequency = <0>;
|
|
|
|
i2c@7000 {
|
|
interrupt-parent = <&mpic>;
|
|
interrupts = <E 0>;
|
|
reg = <7000 400>;
|
|
device_type = "i2c";
|
|
compatible = "tsi108-i2c";
|
|
};
|
|
|
|
MDIO: mdio@6000 {
|
|
device_type = "mdio";
|
|
compatible = "tsi108-mdio";
|
|
reg = <6000 50>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
phy8: ethernet-phy@8 {
|
|
interrupt-parent = <&mpic>;
|
|
interrupts = <2 1>;
|
|
reg = <8>;
|
|
};
|
|
|
|
phy9: ethernet-phy@9 {
|
|
interrupt-parent = <&mpic>;
|
|
interrupts = <2 1>;
|
|
reg = <9>;
|
|
};
|
|
|
|
};
|
|
|
|
ethernet@6200 {
|
|
#size-cells = <0>;
|
|
device_type = "network";
|
|
compatible = "tsi108-ethernet";
|
|
reg = <6000 200>;
|
|
address = [ 00 06 D2 00 00 01 ];
|
|
interrupts = <10 2>;
|
|
interrupt-parent = <&mpic>;
|
|
mdio-handle = <&MDIO>;
|
|
phy-handle = <&phy8>;
|
|
};
|
|
|
|
ethernet@6600 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
device_type = "network";
|
|
compatible = "tsi108-ethernet";
|
|
reg = <6400 200>;
|
|
address = [ 00 06 D2 00 00 02 ];
|
|
interrupts = <11 2>;
|
|
interrupt-parent = <&mpic>;
|
|
mdio-handle = <&MDIO>;
|
|
phy-handle = <&phy9>;
|
|
};
|
|
|
|
serial@7808 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <7808 200>;
|
|
clock-frequency = <3f6b5a00>;
|
|
interrupts = <c 0>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
|
|
serial@7c08 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <7c08 200>;
|
|
clock-frequency = <3f6b5a00>;
|
|
interrupts = <d 0>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
|
|
mpic: pic@7400 {
|
|
clock-frequency = <0>;
|
|
interrupt-controller;
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
reg = <7400 400>;
|
|
built-in;
|
|
compatible = "chrp,open-pic";
|
|
device_type = "open-pic";
|
|
big-endian;
|
|
};
|
|
pci@1000 {
|
|
compatible = "tsi108-pci";
|
|
device_type = "pci";
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
reg = <1000 1000>;
|
|
bus-range = <0 0>;
|
|
ranges = <02000000 0 e0000000 e0000000 0 1A000000
|
|
01000000 0 00000000 fa000000 0 00010000>;
|
|
clock-frequency = <7f28154>;
|
|
interrupt-parent = <&mpic>;
|
|
interrupts = <17 2>;
|
|
interrupt-map-mask = <f800 0 0 7>;
|
|
interrupt-map = <
|
|
|
|
/* IDSEL 0x11 */
|
|
0800 0 0 1 &RT0 24 0
|
|
0800 0 0 2 &RT0 25 0
|
|
0800 0 0 3 &RT0 26 0
|
|
0800 0 0 4 &RT0 27 0
|
|
|
|
/* IDSEL 0x12 */
|
|
1000 0 0 1 &RT0 25 0
|
|
1000 0 0 2 &RT0 26 0
|
|
1000 0 0 3 &RT0 27 0
|
|
1000 0 0 4 &RT0 24 0
|
|
|
|
/* IDSEL 0x13 */
|
|
1800 0 0 1 &RT0 26 0
|
|
1800 0 0 2 &RT0 27 0
|
|
1800 0 0 3 &RT0 24 0
|
|
1800 0 0 4 &RT0 25 0
|
|
|
|
/* IDSEL 0x14 */
|
|
2000 0 0 1 &RT0 27 0
|
|
2000 0 0 2 &RT0 24 0
|
|
2000 0 0 3 &RT0 25 0
|
|
2000 0 0 4 &RT0 26 0
|
|
>;
|
|
|
|
RT0: router@1180 {
|
|
clock-frequency = <0>;
|
|
interrupt-controller;
|
|
device_type = "pic-router";
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
built-in;
|
|
big-endian;
|
|
interrupts = <17 2>;
|
|
interrupt-parent = <&mpic>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|