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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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a9c4814d8d
Patch from Nicolas Pitre For assembly labels to actually be local they must start with ".L" and not only "." otherwise they still remain visible in the final link and clutter kallsyms needlessly, and possibly make for unclear symbolic backtrace. This patch simply inserts a"L" where appropriate. The code itself is unchanged. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
93 lines
1.7 KiB
ArmAsm
93 lines
1.7 KiB
ArmAsm
/*
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* linux/arch/arm/lib/io-writesb.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.macro outword, rd
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#ifndef __ARMEB__
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strb \rd, [r0]
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mov \rd, \rd, lsr #8
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strb \rd, [r0]
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mov \rd, \rd, lsr #8
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strb \rd, [r0]
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mov \rd, \rd, lsr #8
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strb \rd, [r0]
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#else
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mov lr, \rd, lsr #24
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strb lr, [r0]
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mov lr, \rd, lsr #16
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strb lr, [r0]
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mov lr, \rd, lsr #8
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strb lr, [r0]
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strb \rd, [r0]
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#endif
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.endm
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.Loutsb_align: rsb ip, ip, #4
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cmp ip, r2
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movgt ip, r2
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cmp ip, #2
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ldrb r3, [r1], #1
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strb r3, [r0]
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ldrgeb r3, [r1], #1
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strgeb r3, [r0]
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ldrgtb r3, [r1], #1
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strgtb r3, [r0]
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subs r2, r2, ip
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bne .Loutsb_aligned
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ENTRY(__raw_writesb)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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ands ip, r1, #3
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bne .Loutsb_align
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.Loutsb_aligned:
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stmfd sp!, {r4, r5, lr}
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subs r2, r2, #16
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bmi .Loutsb_no_16
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.Loutsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
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outword r3
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outword r4
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outword r5
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outword ip
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subs r2, r2, #16
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bpl .Loutsb_16_lp
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tst r2, #15
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LOADREGS(eqfd, sp!, {r4, r5, pc})
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.Loutsb_no_16: tst r2, #8
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beq .Loutsb_no_8
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ldmia r1!, {r3, r4}
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outword r3
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outword r4
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.Loutsb_no_8: tst r2, #4
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beq .Loutsb_no_4
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ldr r3, [r1], #4
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outword r3
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.Loutsb_no_4: ands r2, r2, #3
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LOADREGS(eqfd, sp!, {r4, r5, pc})
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cmp r2, #2
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ldrb r3, [r1], #1
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strb r3, [r0]
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ldrgeb r3, [r1], #1
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strgeb r3, [r0]
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ldrgtb r3, [r1]
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strgtb r3, [r0]
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LOADREGS(fd, sp!, {r4, r5, pc})
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