190 lines
4.1 KiB
C
190 lines
4.1 KiB
C
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef MSM_CCI_H
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#define MSM_CCI_H
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <media/v4l2-subdev.h>
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#include <media/msm_cam_sensor.h>
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#include "msm_sd.h"
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#define NUM_MASTERS 2
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#define NUM_QUEUES 2
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#define TRUE 1
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#define FALSE 0
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enum cci_i2c_master_t {
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MASTER_0,
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MASTER_1,
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};
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enum cci_i2c_queue_t {
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QUEUE_0,
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QUEUE_1,
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};
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struct msm_camera_cci_client {
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struct v4l2_subdev *cci_subdev;
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uint32_t freq;
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enum cci_i2c_master_t cci_i2c_master;
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uint16_t sid;
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uint16_t cid;
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uint32_t timeout;
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uint16_t retries;
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uint16_t id_map;
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};
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enum msm_cci_cmd_type {
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MSM_CCI_INIT,
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MSM_CCI_RELEASE,
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MSM_CCI_SET_SID,
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MSM_CCI_SET_FREQ,
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MSM_CCI_SET_SYNC_CID,
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MSM_CCI_I2C_READ,
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MSM_CCI_I2C_WRITE,
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MSM_CCI_GPIO_WRITE,
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};
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struct msm_camera_cci_wait_sync_cfg {
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uint16_t line;
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uint16_t delay;
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};
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struct msm_camera_cci_gpio_cfg {
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uint16_t gpio_queue;
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uint16_t i2c_queue;
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};
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struct msm_camera_cci_i2c_write_cfg {
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struct msm_camera_i2c_reg_conf *reg_conf_tbl;
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enum msm_camera_i2c_reg_addr_type addr_type;
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enum msm_camera_i2c_data_type data_type;
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uint16_t size;
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};
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struct msm_camera_cci_i2c_read_cfg {
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uint16_t addr;
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enum msm_camera_i2c_reg_addr_type addr_type;
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uint8_t *data;
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uint16_t num_byte;
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};
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struct msm_camera_cci_i2c_queue_info {
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uint32_t max_queue_size;
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uint32_t report_id;
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uint32_t irq_en;
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uint32_t capture_rep_data;
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};
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struct msm_camera_cci_ctrl {
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int32_t status;
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struct msm_camera_cci_client *cci_info;
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enum msm_cci_cmd_type cmd;
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union {
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struct msm_camera_cci_i2c_write_cfg cci_i2c_write_cfg;
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struct msm_camera_cci_i2c_read_cfg cci_i2c_read_cfg;
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struct msm_camera_cci_wait_sync_cfg cci_wait_sync_cfg;
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struct msm_camera_cci_gpio_cfg gpio_cfg;
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} cfg;
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};
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struct msm_camera_cci_master_info {
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uint32_t status;
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uint8_t reset_pending;
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struct mutex mutex;
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struct completion reset_complete;
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};
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struct msm_cci_clk_params_t {
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uint16_t hw_thigh;
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uint16_t hw_tlow;
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uint16_t hw_tsu_sto;
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uint16_t hw_tsu_sta;
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uint16_t hw_thd_dat;
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uint16_t hw_thd_sta;
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uint16_t hw_tbuf;
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uint8_t hw_scl_stretch_en;
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uint8_t hw_trdhld;
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uint8_t hw_tsp;
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};
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enum msm_cci_state_t {
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CCI_STATE_ENABLED,
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CCI_STATE_DISABLED,
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};
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struct cci_device {
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struct platform_device *pdev;
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struct msm_sd_subdev msm_sd;
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struct v4l2_subdev subdev;
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struct resource *mem;
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struct resource *irq;
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struct resource *io;
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void __iomem *base;
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uint32_t hw_version;
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uint8_t ref_count;
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enum msm_cci_state_t cci_state;
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struct clk *cci_clk[5];
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struct msm_camera_cci_i2c_queue_info
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cci_i2c_queue_info[NUM_MASTERS][NUM_QUEUES];
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struct msm_camera_cci_master_info cci_master_info[NUM_MASTERS];
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struct msm_cci_clk_params_t cci_clk_params;
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struct gpio *cci_gpio_tbl;
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uint8_t cci_gpio_tbl_size;
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};
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enum msm_cci_i2c_cmd_type {
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CCI_I2C_SET_PARAM_CMD = 1,
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CCI_I2C_WAIT_CMD,
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CCI_I2C_WAIT_SYNC_CMD,
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CCI_I2C_WAIT_GPIO_EVENT_CMD,
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CCI_I2C_TRIG_I2C_EVENT_CMD,
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CCI_I2C_LOCK_CMD,
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CCI_I2C_UNLOCK_CMD,
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CCI_I2C_REPORT_CMD,
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CCI_I2C_WRITE_CMD,
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CCI_I2C_READ_CMD,
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CCI_I2C_WRITE_DISABLE_P_CMD,
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CCI_I2C_READ_DISABLE_P_CMD,
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CCI_I2C_WRITE_CMD2,
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CCI_I2C_WRITE_CMD3,
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CCI_I2C_REPEAT_CMD,
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CCI_I2C_INVALID_CMD,
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};
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enum msm_cci_gpio_cmd_type {
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CCI_GPIO_SET_PARAM_CMD = 1,
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CCI_GPIO_WAIT_CMD,
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CCI_GPIO_WAIT_SYNC_CMD,
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CCI_GPIO_WAIT_GPIO_IN_EVENT_CMD,
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CCI_GPIO_WAIT_I2C_Q_TRIG_EVENT_CMD,
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CCI_GPIO_OUT_CMD,
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CCI_GPIO_TRIG_EVENT_CMD,
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CCI_GPIO_REPORT_CMD,
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CCI_GPIO_REPEAT_CMD,
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CCI_GPIO_CONTINUE_CMD,
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CCI_GPIO_INVALID_CMD,
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};
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struct v4l2_subdev *msm_cci_get_subdev(void);
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#define VIDIOC_MSM_CCI_CFG \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct msm_camera_cci_ctrl *)
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#endif
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