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83544ae9f3
Some engines have transfer size and address alignment restrictions. Add a per-operation alignment property to struct dma_device that the async routines and dmatest can use to check alignment capabilities. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
88 lines
2.6 KiB
C
88 lines
2.6 KiB
C
/*
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* memory fill offload engine support
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*
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* Copyright © 2006, Intel Corporation.
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*
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* Dan Williams <dan.j.williams@intel.com>
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*
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* with architecture considerations by:
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* Neil Brown <neilb@suse.de>
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* Jeff Garzik <jeff@garzik.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/async_tx.h>
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/**
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* async_memset - attempt to fill memory with a dma engine.
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* @dest: destination page
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* @val: fill value
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* @offset: offset in pages to start transaction
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* @len: length in bytes
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*
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* honored flags: ASYNC_TX_ACK
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*/
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struct dma_async_tx_descriptor *
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async_memset(struct page *dest, int val, unsigned int offset, size_t len,
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struct async_submit_ctl *submit)
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{
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struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMSET,
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&dest, 1, NULL, 0, len);
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struct dma_device *device = chan ? chan->device : NULL;
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struct dma_async_tx_descriptor *tx = NULL;
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if (device && is_dma_fill_aligned(device, offset, 0, len)) {
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dma_addr_t dma_dest;
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unsigned long dma_prep_flags = 0;
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if (submit->cb_fn)
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dma_prep_flags |= DMA_PREP_INTERRUPT;
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if (submit->flags & ASYNC_TX_FENCE)
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dma_prep_flags |= DMA_PREP_FENCE;
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dma_dest = dma_map_page(device->dev, dest, offset, len,
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DMA_FROM_DEVICE);
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tx = device->device_prep_dma_memset(chan, dma_dest, val, len,
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dma_prep_flags);
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}
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if (tx) {
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pr_debug("%s: (async) len: %zu\n", __func__, len);
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async_tx_submit(chan, tx, submit);
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} else { /* run the memset synchronously */
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void *dest_buf;
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pr_debug("%s: (sync) len: %zu\n", __func__, len);
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dest_buf = page_address(dest) + offset;
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/* wait for any prerequisite operations */
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async_tx_quiesce(&submit->depend_tx);
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memset(dest_buf, val, len);
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async_tx_sync_epilog(submit);
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}
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return tx;
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}
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EXPORT_SYMBOL_GPL(async_memset);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("asynchronous memset api");
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MODULE_LICENSE("GPL");
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