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9ba2779419
On some 5701 devices with older bootcode, the LED configuration bits in SRAM may be invalid with value zero. The fix is to check for invalid bits (0) and default to PHY 1 mode. Incorrect LED mode will lead to error in programming the PHY. Thanks to Grant Grundler for debugging the problem. >From Grant: | In May, 2004, tg3 v3.4 changed how MAC_LED_CTRL (0x40c) was getting | programmed and how to determine what to program into LED_CTRL. The new | code trusted NIC_SRAM_DATA_CFG (0x00000b58) to indicate what to write | to LED_CTRL and MII EXT_CTRL registers. On "IOX Core Lan", SRAM was | saying MODE_MAC (0x0) and that doesn't work. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| atm | ||
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| block | ||
| bluetooth | ||
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| char | ||
| cpufreq | ||
| crypto | ||
| dio | ||
| eisa | ||
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| misc | ||
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| oprofile | ||
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| sh | ||
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| telephony | ||
| usb | ||
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| w1 | ||
| zorro | ||
| Kconfig | ||
| Makefile | ||