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f53f066c25
Since the number of dma channels varies between pxa25x and pxa27x, it introduces some specific code in dma.c. This patch moves the specific code to pxa25x.c and pxa27x.c and makes dma.c more generic. 1. add pxa_init_dma() for dma initialization, the number of channels are passed in by the argument 2. add a "prio" field to the "struct pxa_dma_channel" for the channel priority, and is initialized in pxa_init_dma() 3. use a general priority comparison with the channels "prio" field so to remove the processor specific pxa_for_each_dma_prio macro, this is not lightning fast as the original one, but it is acceptable as it happens when requesting dma, which is usually not so performance critical Signed-off-by: eric miao <eric.miao@marvell.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
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* linux/include/asm-arm/arch-pxa/dma.h
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_DMA_H
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#define __ASM_ARCH_DMA_H
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/*
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* Descriptor structure for PXA's DMA engine
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* Note: this structure must always be aligned to a 16-byte boundary.
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*/
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typedef struct pxa_dma_desc {
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volatile u32 ddadr; /* Points to the next descriptor + flags */
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volatile u32 dsadr; /* DSADR value for the current transfer */
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volatile u32 dtadr; /* DTADR value for the current transfer */
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volatile u32 dcmd; /* DCMD value for the current transfer */
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} pxa_dma_desc;
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typedef enum {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MEDIUM = 1,
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DMA_PRIO_LOW = 2
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} pxa_dma_prio;
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/*
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* DMA registration
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*/
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int __init pxa_init_dma(int num_ch);
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int pxa_request_dma (char *name,
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pxa_dma_prio prio,
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void (*irq_handler)(int, void *),
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void *data);
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void pxa_free_dma (int dma_ch);
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#endif /* _ASM_ARCH_DMA_H */
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