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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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cbb870c822
Use asm offsets to make sure the offset defines to struct _lowcore and its layout don't get out of sync. Also add a BUILD_BUG_ON() which checks that the size of the structure is sane. And while being at it change those sites which use odd casts to access the current lowcore. These should use S390_lowcore instead. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
86 lines
2.4 KiB
ArmAsm
86 lines
2.4 KiB
ArmAsm
/*
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* arch/s390/kernel/reipl.S
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*
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* S390 version
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* Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
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*/
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#include <asm/asm-offsets.h>
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#
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# do_reipl_asm
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# Parameter: r2 = schid of reipl device
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#
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.globl do_reipl_asm
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do_reipl_asm: basr %r13,0
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.Lpg0: lpsw .Lnewpsw-.Lpg0(%r13)
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.Lpg1: # do store status of all registers
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stm %r0,%r15,__LC_GPREGS_SAVE_AREA
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stctl %c0,%c15,__LC_CREGS_SAVE_AREA
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stam %a0,%a15,__LC_AREGS_SAVE_AREA
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l %r10,.Ldump_pfx-.Lpg0(%r13)
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mvc __LC_PREFIX_SAVE_AREA(4),0(%r10)
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stckc .Lclkcmp-.Lpg0(%r13)
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mvc __LC_CLOCK_COMP_SAVE_AREA(8),.Lclkcmp-.Lpg0(%r13)
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stpt __LC_CPU_TIMER_SAVE_AREA
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st %r13, __LC_PSW_SAVE_AREA+4
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lctl %c6,%c6,.Lall-.Lpg0(%r13)
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lr %r1,%r2
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mvc __LC_PGM_NEW_PSW(8),.Lpcnew-.Lpg0(%r13)
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stsch .Lschib-.Lpg0(%r13)
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oi .Lschib+5-.Lpg0(%r13),0x84
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.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
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msch .Lschib-.Lpg0(%r13)
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lhi %r0,5
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.Lssch: ssch .Liplorb-.Lpg0(%r13)
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jz .L001
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brct %r0,.Lssch
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bas %r14,.Ldisab-.Lpg0(%r13)
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.L001: mvc __LC_IO_NEW_PSW(8),.Lionew-.Lpg0(%r13)
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.Ltpi: lpsw .Lwaitpsw-.Lpg0(%r13)
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.Lcont: c %r1,__LC_SUBCHANNEL_ID
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jnz .Ltpi
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clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
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jnz .Ltpi
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tsch .Liplirb-.Lpg0(%r13)
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tm .Liplirb+9-.Lpg0(%r13),0xbf
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jz .L002
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bas %r14,.Ldisab-.Lpg0(%r13)
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.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
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jz .L003
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bas %r14,.Ldisab-.Lpg0(%r13)
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.L003: st %r1,__LC_SUBCHANNEL_ID
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lpsw 0
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sigp 0,0,0(6)
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.Ldisab: st %r14,.Ldispsw+4-.Lpg0(%r13)
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lpsw .Ldispsw-.Lpg0(%r13)
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.align 8
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.Lclkcmp: .quad 0x0000000000000000
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.Lall: .long 0xff000000
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.Ldump_pfx: .long dump_prefix_page
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.align 8
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.Lnewpsw: .long 0x00080000,0x80000000+.Lpg1
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.Lpcnew: .long 0x00080000,0x80000000+.Lecs
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.Lionew: .long 0x00080000,0x80000000+.Lcont
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.Lwaitpsw: .long 0x020a0000,0x00000000+.Ltpi
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.Ldispsw: .long 0x000a0000,0x00000000
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.Liplccws: .long 0x02000000,0x60000018
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.long 0x08000008,0x20000001
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.Liplorb: .long 0x0049504c,0x0040ff80
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.long 0x00000000+.Liplccws
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.Lschib: .long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.Liplirb: .long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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