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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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f80dff9da0
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
82 lines
2 KiB
ArmAsm
82 lines
2 KiB
ArmAsm
/*
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* include/asm-arm/arch-omap/entry-macro.S
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*
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* Low-level IRQ helper macros for OMAP-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware.h>
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#include <asm/arch/irqs.h>
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#if defined(CONFIG_ARCH_OMAP1)
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#if defined(CONFIG_ARCH_OMAP730) && \
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(defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
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#error "FIXME: OMAP730 doesn't support multiple-OMAP"
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#elif defined(CONFIG_ARCH_OMAP730)
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#define INT_IH2_IRQ INT_730_IH2_IRQ
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#elif defined(CONFIG_ARCH_OMAP15XX)
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#define INT_IH2_IRQ INT_1510_IH2_IRQ
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#elif defined(CONFIG_ARCH_OMAP16XX)
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#define INT_IH2_IRQ INT_1610_IH2_IRQ
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#else
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#warning "IH2 IRQ defaulted"
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#define INT_IH2_IRQ INT_1510_IH2_IRQ
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#endif
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =IO_ADDRESS(OMAP_IH1_BASE)
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ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
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ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET]
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mov \irqstat, #0xffffffff
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bic \tmp, \irqstat, \tmp
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tst \irqnr, \tmp
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beq 1510f
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ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
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cmp \irqnr, #0
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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cmpeq \irqnr, #INT_IH2_IRQ
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ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE)
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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addeqs \irqnr, \irqnr, #32
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1510:
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.endm
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#elif defined(CONFIG_ARCH_OMAP24XX)
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#include <asm/arch/omap24xx.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =VA_IC_BASE
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ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
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cmp \irqnr, #0x0
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bne 2222f
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ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
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cmp \irqnr, #0x0
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bne 2222f
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ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
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cmp \irqnr, #0x0
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2222:
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ldrne \irqnr, [\base, #IRQ_SIR_IRQ]
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.endm
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.macro irq_prio_table
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.endm
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#endif
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