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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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66a740572d
Currently the INTC2 code contains a fixed IRQ table that it iterates through to set the handler type, we move this in to the CPU subtype setup code instead and allow for submitting the table that way. This drops the ST40 tables, as nothing has been happening with those processors, while converting the only existing users to use the new table directly (SH7760 and SH7780). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
79 lines
2.1 KiB
C
79 lines
2.1 KiB
C
/*
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* Interrupt handling for INTC2-based IRQ.
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*
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* Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
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* Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org)
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* These are the "new Hitachi style" interrupts, as present on the
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* Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
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*/
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/system.h>
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static void disable_intc2_irq(unsigned int irq)
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{
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struct intc2_data *p = get_irq_chip_data(irq);
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ctrl_outl(1 << p->msk_shift,
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INTC2_BASE + INTC2_INTMSK_OFFSET + p->msk_offset);
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}
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static void enable_intc2_irq(unsigned int irq)
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{
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struct intc2_data *p = get_irq_chip_data(irq);
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ctrl_outl(1 << p->msk_shift,
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INTC2_BASE + INTC2_INTMSKCLR_OFFSET + p->msk_offset);
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}
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static struct irq_chip intc2_irq_chip = {
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.name = "INTC2",
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.mask = disable_intc2_irq,
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.unmask = enable_intc2_irq,
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.mask_ack = disable_intc2_irq,
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};
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/*
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* Setup an INTC2 style interrupt.
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* NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
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* allowing the use of the numbers straight out of the datasheet.
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* For example:
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* PIO1 which is INTPRI00[19,16] and INTMSK00[13]
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* would be: ^ ^ ^ ^
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* | | | |
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* { 84, 0, 16, 0, 13 },
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*
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* in the intc2_data table.
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*/
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void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
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{
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int i;
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for (i = 0; i < nr_irqs; i++) {
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unsigned long ipr, flags;
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struct intc2_data *p = table + i;
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disable_irq_nosync(p->irq);
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/* Set the priority level */
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local_irq_save(flags);
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ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET +
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p->ipr_offset);
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ipr &= ~(0xf << p->ipr_shift);
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ipr |= p->priority << p->ipr_shift;
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ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET +
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p->ipr_offset);
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local_irq_restore(flags);
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set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
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handle_level_irq, "level");
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set_irq_chip_data(p->irq, p);
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enable_intc2_irq(p->irq);
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}
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}
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