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2f05032467
commit 9dcc87fec8947308e0111c65dcd881e6aa5b1673 upstream. sam9x5 SoCs have the following errata: "RTC: Interrupt Mask Register cannot be used Interrupt Mask Register read always returns 0." Hence we should not rely on what IMR claims about already masked IRQs and just disable all IRQs. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Reported-by: Bryan Evenson <bevenson@melinkcorp.com> Reviewed-by: Johan Hovold <johan@hovold.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Bryan Evenson <bevenson@melinkcorp.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Mark Roszko <mark.roszko@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
75 lines
2 KiB
C
75 lines
2 KiB
C
/*
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* sysirq_mask.c - System-interrupt masking
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*
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* Copyright (C) 2013 Johan Hovold <jhovold@gmail.com>
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*
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* Functions to disable system interrupts from backup-powered peripherals.
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*
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* The RTC and RTT-peripherals are generally powered by backup power (VDDBU)
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* and are not reset on wake-up, user, watchdog or software reset. This means
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* that their interrupts may be enabled during early boot (e.g. after a user
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* reset).
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*
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* As the RTC and RTT share the system-interrupt line with the PIT, an
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* interrupt occurring before a handler has been installed would lead to the
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* system interrupt being disabled and prevent the system from booting.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/io.h>
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#include <mach/at91_rtt.h>
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#include "generic.h"
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#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
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#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
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#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */
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void __init at91_sysirq_mask_rtc(u32 rtc_base)
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{
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void __iomem *base;
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base = ioremap(rtc_base, 64);
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if (!base)
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return;
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/*
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* sam9x5 SoCs have the following errata:
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* "RTC: Interrupt Mask Register cannot be used
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* Interrupt Mask Register read always returns 0."
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*
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* Hence we're not relying on IMR values to disable
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* interrupts.
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*/
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writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
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(void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
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iounmap(base);
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}
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void __init at91_sysirq_mask_rtt(u32 rtt_base)
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{
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void __iomem *base;
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void __iomem *reg;
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u32 mode;
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base = ioremap(rtt_base, 16);
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if (!base)
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return;
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reg = base + AT91_RTT_MR;
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mode = readl_relaxed(reg);
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if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) {
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pr_info("AT91: Disabling rtt irq\n");
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mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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writel_relaxed(mode, reg);
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(void)readl_relaxed(reg); /* flush */
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}
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iounmap(base);
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}
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