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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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e33c7a4764
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. Change-Id: I4ef2b002074e1205ee141539bfe60d06735ce5f4 [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Git-commit: 7b6d864b48d95e6ea1df7df64475b9cb9616dcf9 Git-Repo: git://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/ [abhimany@codeaurora.org: make similar changes for mach-msm] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
195 lines
4.5 KiB
C
195 lines
4.5 KiB
C
/*
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* arch/arm/mach-netx/generic.c
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*
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* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/irqchip/arm-vic.h>
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#include <linux/reboot.h>
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#include <mach/hardware.h>
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#include <asm/mach/map.h>
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#include <mach/netx-regs.h>
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#include <asm/mach/irq.h>
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static struct map_desc netx_io_desc[] __initdata = {
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{
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.virtual = NETX_IO_VIRT,
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.pfn = __phys_to_pfn(NETX_IO_PHYS),
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.length = NETX_IO_SIZE,
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.type = MT_DEVICE
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}
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};
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void __init netx_map_io(void)
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{
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iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc));
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}
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static struct resource netx_rtc_resources[] = {
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[0] = {
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.start = 0x00101200,
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.end = 0x00101220,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device netx_rtc_device = {
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.name = "netx-rtc",
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.id = 0,
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.num_resources = ARRAY_SIZE(netx_rtc_resources),
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.resource = netx_rtc_resources,
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};
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static struct platform_device *devices[] __initdata = {
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&netx_rtc_device,
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};
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#if 0
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#define DEBUG_IRQ(fmt...) printk(fmt)
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#else
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#define DEBUG_IRQ(fmt...) while (0) {}
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#endif
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static void
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netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
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{
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unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
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unsigned int stat;
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stat = ((readl(NETX_DPMAS_INT_EN) &
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readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
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while (stat) {
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if (stat & 1) {
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DEBUG_IRQ("handling irq %d\n", irq);
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generic_handle_irq(irq);
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}
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irq++;
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stat >>= 1;
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}
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}
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static int
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netx_hif_irq_type(struct irq_data *d, unsigned int type)
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{
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unsigned int val, irq;
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val = readl(NETX_DPMAS_IF_CONF1);
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irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
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if (type & IRQ_TYPE_EDGE_RISING) {
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DEBUG_IRQ("rising edges\n");
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val |= (1 << 26) << irq;
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}
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if (type & IRQ_TYPE_EDGE_FALLING) {
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DEBUG_IRQ("falling edges\n");
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val &= ~((1 << 26) << irq);
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}
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if (type & IRQ_TYPE_LEVEL_LOW) {
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DEBUG_IRQ("low level\n");
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val &= ~((1 << 26) << irq);
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}
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if (type & IRQ_TYPE_LEVEL_HIGH) {
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DEBUG_IRQ("high level\n");
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val |= (1 << 26) << irq;
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}
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writel(val, NETX_DPMAS_IF_CONF1);
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return 0;
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}
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static void
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netx_hif_ack_irq(struct irq_data *d)
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{
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unsigned int val, irq;
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irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
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writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
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val = readl(NETX_DPMAS_INT_EN);
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val &= ~((1 << 24) << irq);
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writel(val, NETX_DPMAS_INT_EN);
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DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
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}
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static void
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netx_hif_mask_irq(struct irq_data *d)
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{
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unsigned int val, irq;
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irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
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val = readl(NETX_DPMAS_INT_EN);
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val &= ~((1 << 24) << irq);
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writel(val, NETX_DPMAS_INT_EN);
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DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
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}
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static void
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netx_hif_unmask_irq(struct irq_data *d)
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{
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unsigned int val, irq;
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irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
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val = readl(NETX_DPMAS_INT_EN);
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val |= (1 << 24) << irq;
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writel(val, NETX_DPMAS_INT_EN);
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DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
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}
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static struct irq_chip netx_hif_chip = {
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.irq_ack = netx_hif_ack_irq,
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.irq_mask = netx_hif_mask_irq,
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.irq_unmask = netx_hif_unmask_irq,
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.irq_set_type = netx_hif_irq_type,
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};
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void __init netx_init_irq(void)
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{
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int irq;
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vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
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for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
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irq_set_chip_and_handler(irq, &netx_hif_chip,
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handle_level_irq);
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set_irq_flags(irq, IRQF_VALID);
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}
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writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
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irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
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}
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static int __init netx_init(void)
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{
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return platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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subsys_initcall(netx_init);
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void netx_restart(enum reboot_mode mode, const char *cmd)
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{
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writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
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NETX_SYSTEM_RES_CR);
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}
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