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https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
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562540687b
Disable POPP feature by default for all targets and enable for a specific target by adding the entry in its dtsi file. Conflicts: Documentation/devicetree/bindings/gpu/adreno.txt Change-Id: I1c2ed1af9e94470ef734b75bb2af3e093517b35d Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
94 lines
3.1 KiB
C
94 lines
3.1 KiB
C
#ifndef _MSM_KGSL_H
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#define _MSM_KGSL_H
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#include <uapi/linux/msm_kgsl.h>
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/* Clock flags to show which clocks should be controled by a given platform */
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#define KGSL_CLK_SRC 0x00000001
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#define KGSL_CLK_CORE 0x00000002
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#define KGSL_CLK_IFACE 0x00000004
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#define KGSL_CLK_MEM 0x00000008
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#define KGSL_CLK_MEM_IFACE 0x00000010
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#define KGSL_CLK_AXI 0x00000020
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#define KGSL_CLK_ALT_MEM_IFACE 0x00000040
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#define KGSL_CLK_RBBMTIMER 0x00000080
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#define KGSL_CLK_GFX_GTCU 0x00000100
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#define KGSL_CLK_GFX_GTBU 0x00000200
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#define KGSL_CLK_AON 0x00000400
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#define KGSL_CLK_GFX_GTBU1 0x00000800
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#define KGSL_MAX_PWRLEVELS 10
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#define KGSL_3D0_REG_MEMORY "kgsl_3d0_reg_memory"
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#define KGSL_3D0_SHADER_MEMORY "kgsl_3d0_shader_memory"
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#define KGSL_3D0_IRQ "kgsl_3d0_irq"
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/**
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* struct kgsl_pwrlevel - Struct holding different pwrlevel info obtained from
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* from dtsi file
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* @gpu_freq: GPU frequency vote in Hz
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* @bus_freq: Bus bandwidth vote index
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* @bus_min: Min bus index @gpu_freq
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* @bus_max: Max bus index @gpu_freq
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*/
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struct kgsl_pwrlevel {
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unsigned int gpu_freq;
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unsigned int bus_freq;
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unsigned int bus_min;
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unsigned int bus_max;
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};
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/**
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* struct kgsl_device_platform_data - Struct holding all the device info
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* obtained from the dtsi file
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* @pwrlevel: Array of struct holding pwrlevel information
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* @init_level: Pwrlevel device is initialized with
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* @num_levels: Number of pwrlevels for the specific device
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* @idle_timeout: Timeout for GPU to turn its resources off
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* @strtstp_sleepwake: Flag to decide b/w SLEEP and SLUMBER
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* @bus_control: Flag if independent bus voting is supported
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* @popp_enable: Flag to enable POPP feature
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* @clk_map: Clocks map per platform
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* @bus_scale_table: Bus table with different b/w votes
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* @iommu_data: Struct holding iommu context data
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* @iommu_count: Number of IOMMU units for the GPU
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* @csdev: Pointer to the coresight device for this device
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* @coresight_pdata: Coresight configuration for specific device
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* @chipid: Chip ID for the device's GPU
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* @pm_qos_active_latency: GPU PM QoS latency request for active state
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* @pm_qos_wakeup_latency: GPU PM QoS latency request during wakeup
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*/
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struct kgsl_device_platform_data {
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struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS];
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int init_level;
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int num_levels;
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unsigned int idle_timeout;
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bool strtstp_sleepwake;
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bool bus_control;
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bool popp_enable;
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unsigned int clk_map;
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unsigned int step_mul;
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struct msm_bus_scale_pdata *bus_scale_table;
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struct kgsl_device_iommu_data *iommu_data;
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int iommu_count;
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struct coresight_device *csdev;
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struct coresight_platform_data *coresight_pdata;
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unsigned int chipid;
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unsigned int pm_qos_active_latency;
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unsigned int pm_qos_wakeup_latency;
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};
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/* Limits mitigations APIs */
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void *kgsl_pwr_limits_add(enum kgsl_deviceid id);
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void kgsl_pwr_limits_del(void *limit);
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int kgsl_pwr_limits_set_freq(void *limit, unsigned int freq);
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void kgsl_pwr_limits_set_default(void *limit);
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unsigned int kgsl_pwr_limits_get_freq(enum kgsl_deviceid id);
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#ifdef CONFIG_MSM_KGSL_DRM
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int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start,
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unsigned long *len);
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#else
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#define kgsl_gem_obj_addr(...) 0
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#endif
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#endif /* _MSM_KGSL_H */
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