Olof Johansson f66bce5e6a [POWERPC] Add 1TB workaround for PA6T ... PA6T has a bug where the slbie instruction does not honor the large segment bit. As a result, we have to always use slbia when switching context. We don't have to worry about changing the slbie's during fault processing, since they should never be replacing one VSID with another using the same ESID. I.e. there's no risk for inserting duplicate entries due to a failed slbie of the old entry. So as long as we clear it out on context switch we should be fine. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>		2007-10-17 22:30:09 +10:00
..
boot	[POWERPC] Add memchr() to the bootwrapper	2007-10-12 14:13:44 +10:00
configs	[POWERPC] Enable NO_HZ and high res timers for pseries and ppc64 configs	2007-10-17 22:30:09 +10:00
kernel	[POWERPC] Add 1TB workaround for PA6T	2007-10-17 22:30:09 +10:00
lib	[POWERPC] Limit range of __init_ref_ok somewhat	2007-10-03 11:48:44 +10:00
math-emu
mm	[POWERPC] Add 1TB workaround for PA6T	2007-10-17 22:30:09 +10:00
oprofile	[POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h	2007-10-09 21:01:56 +10:00
platforms	[POWERPC] Fix iSeries_hpte_insert prototype	2007-10-17 22:30:08 +10:00
sysdev	Use dcr_host_t.base in dcr_unmap()	2007-10-15 14:29:49 -04:00
xmon	[POWERPC] fix showing xmon help	2007-07-22 21:30:58 +10:00
.gitignore
Kconfig	ppc64: SPARSEMEM_VMEMMAP support	2007-10-16 09:42:51 -07:00
Kconfig.debug	kconfig: syntax cleanup - drop support for "depends/requires/def_boolean"	2007-10-12 21:20:32 +02:00
Makefile	kbuild: enable 'make CPPFLAGS=...' to add additional options to CPP	2007-10-15 22:17:25 +02:00