mirror of
https://github.com/team-infusion-developers/android_hardware_samsung.git
synced 2024-11-06 21:55:41 +00:00
exynos4: update media headers
Change-Id: Ia6221554d290c46f11c68e276dda41c8ebe3a7ab
This commit is contained in:
codeworkx
parent
a7d49af0a9
commit
79b8917c20
6 changed files with 2713 additions and 1388 deletions
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@ -29,7 +29,8 @@ extern "C" {
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#endif
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#include <linux/videodev2.h>
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#include "videodev2_samsung.h"
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#include "videodev2_exynos_camera.h"
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#include "videodev2_exynos_media.h"
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#ifdef __cplusplus
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}
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@ -295,4 +296,4 @@ inline unsigned int FRAME_SIZE(int HAL_PIXEL_FORMAT, int w, int h)
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return frame_size;
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}
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#endif //__SAMSUNG_SYSLSI_SEC_COMMON_H__
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#endif //__SAMSUNG_SYSLSI_SEC_COMMON_H__
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@ -185,6 +185,7 @@ enum v4l2_memory {
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V4L2_MEMORY_MMAP = 1,
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V4L2_MEMORY_USERPTR = 2,
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V4L2_MEMORY_OVERLAY = 3,
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V4L2_MEMORY_DMABUF = 4,
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};
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/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
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@ -343,16 +344,15 @@ struct v4l2_pix_format {
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#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */
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#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */
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#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */
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#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */
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#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
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/* two non contiguous planes - one Y, one Cr + Cb interleaved */
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#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
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#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */
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#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */
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#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 macroblocks */
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/* three non contiguous planes - Y, Cb, Cr */
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#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'U', 'V', 'M') /* 12 YUV420 planar */
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#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'V', 'U', 'M') /* 12 YVU420 planar */
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#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'M', '1', '2') /* 12 YUV420 planar */
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/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */
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#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */
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@ -379,23 +379,16 @@ struct v4l2_pix_format {
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#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */
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#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */
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#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */
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#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */
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#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 */
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#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */
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#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */
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#define V4L2_PIX_FMT_H264_NO_SC v4l2_fourcc('A', 'V', 'C', '1') /* H264 without start codes */
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#define V4L2_PIX_FMT_H263 v4l2_fourcc('H', '2', '6', '3') /* H263 */
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#define V4L2_PIX_FMT_MPEG12 v4l2_fourcc('M', 'P', '1', '2') /* MPEG-1/2 */
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#define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 */
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#define V4L2_PIX_FMT_FIMV v4l2_fourcc('F', 'I', 'M', 'V') /* FIMV */
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#define V4L2_PIX_FMT_FIMV1 v4l2_fourcc('F', 'I', 'M', '1') /* FIMV1 */
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#define V4L2_PIX_FMT_FIMV2 v4l2_fourcc('F', 'I', 'M', '2') /* FIMV2 */
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#define V4L2_PIX_FMT_FIMV3 v4l2_fourcc('F', 'I', 'M', '3') /* FIMV3 */
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#define V4L2_PIX_FMT_FIMV4 v4l2_fourcc('F', 'I', 'M', '4') /* FIMV4 */
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#define V4L2_PIX_FMT_MPEG1 v4l2_fourcc('M', 'P', 'G', '1') /* MPEG-1 ES */
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#define V4L2_PIX_FMT_MPEG2 v4l2_fourcc('M', 'P', 'G', '2') /* MPEG-2 ES */
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#define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 ES */
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#define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */
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#define V4L2_PIX_FMT_VC1 v4l2_fourcc('V', 'C', '1', 'A') /* VC-1 */
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#define V4L2_PIX_FMT_VC1_RCV v4l2_fourcc('V', 'C', '1', 'R') /* VC-1 RCV */
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#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
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#define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') /* SMPTE 421M Annex G compliant stream */
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#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
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/* Vendor-specific formats */
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#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
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@ -411,6 +404,7 @@ struct v4l2_pix_format {
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#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */
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#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */
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#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */
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#define V4L2_PIX_FMT_JL2005BCD v4l2_fourcc('J', 'L', '2', '0') /* compressed RGGB bayer */
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#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */
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#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */
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#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */
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@ -421,14 +415,10 @@ struct v4l2_pix_format {
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#define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */
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#define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */
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#define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */
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/* RGB x:10:10:10 */
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#define V4L2_PIX_FMT_INTC_RGB30 v4l2_fourcc('R', 'G', 'B', '0')
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#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */
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#define V4L2_PIX_FMT_JPEG_444 v4l2_fourcc('J', 'P', 'G', '4') /* yuv444 of JFIF JPEG */
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#define V4L2_PIX_FMT_JPEG_422 v4l2_fourcc('J', 'P', 'G', '2') /* yuv422 of JFIF JPEG */
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#define V4L2_PIX_FMT_JPEG_420 v4l2_fourcc('J', 'P', 'G', '0') /* yuv420 of JFIF JPEG */
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#define V4L2_PIX_FMT_JPEG_GRAY v4l2_fourcc('J', 'P', 'G', 'G') /* grey of JFIF JPEG */
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#define V4L2_PIX_FMT_YUV444_2P v4l2_fourcc('Y', 'U', '2', 'P') /* 16 xxxxyyyy uuuuvvvv */
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#define V4L2_PIX_FMT_YVU444_2P v4l2_fourcc('Y', 'V', '2', 'P') /* 16 xxxxyyyy uuuuvvvv */
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#define V4L2_PIX_FMT_YUV444_3P v4l2_fourcc('Y', 'U', '3', 'P') /* 16 xxxxyyyy uuuuvvvv */
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/*
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* F O R M A T E N U M E R A T I O N
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*/
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@ -590,6 +580,8 @@ struct v4l2_requestbuffers {
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* should be passed to mmap() called on the video node)
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* @userptr: when memory is V4L2_MEMORY_USERPTR, a userspace pointer
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* pointing to this plane
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* @fd: when memory is V4L2_MEMORY_DMABUF, a userspace file
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* descriptor associated with this plane
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* @data_offset: offset in the plane to the start of data; usually 0,
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* unless there is a header in front of the data
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*
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@ -604,11 +596,10 @@ struct v4l2_plane {
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union {
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__u32 mem_offset;
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unsigned long userptr;
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int fd;
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} m;
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__u32 data_offset;
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void *cookie;
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void *share;
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__u32 reserved[9];
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__u32 reserved[11];
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};
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/**
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@ -628,6 +619,9 @@ struct v4l2_plane {
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* (or a "cookie" that should be passed to mmap() as offset)
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* @userptr: for non-multiplanar buffers with memory == V4L2_MEMORY_USERPTR;
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* a userspace pointer pointing to this buffer
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* @fd: for non-multiplanar buffers with
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* memory == V4L2_MEMORY_DMABUF; a userspace file descriptor
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* associated with this buffer
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* @planes: for multiplanar buffers; userspace pointer to the array of plane
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* info structs for this buffer
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* @length: size in bytes of the buffer (NOT its payload) for single-plane
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@ -654,6 +648,7 @@ struct v4l2_buffer {
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__u32 offset;
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unsigned long userptr;
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struct v4l2_plane *planes;
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int fd;
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} m;
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__u32 length;
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__u32 input;
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@ -671,6 +666,10 @@ struct v4l2_buffer {
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#define V4L2_BUF_FLAG_ERROR 0x0040
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#define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */
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#define V4L2_BUF_FLAG_INPUT 0x0200 /* input field is valid */
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#define V4L2_BUF_FLAG_PREPARED 0x0400 /* Buffer is prepared for queuing */
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/* Cache handling flags */
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#define V4L2_BUF_FLAG_NO_CACHE_INVALIDATE 0x0800
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#define V4L2_BUF_FLAG_NO_CACHE_CLEAN 0x1000
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/*
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* O V E R L A Y P R E V I E W
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@ -756,6 +755,48 @@ struct v4l2_crop {
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struct v4l2_rect c;
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};
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/* Hints for adjustments of selection rectangle */
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#define V4L2_SEL_FLAG_GE 0x00000001
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#define V4L2_SEL_FLAG_LE 0x00000002
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/* Selection targets */
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/* current cropping area */
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#define V4L2_SEL_TGT_CROP_ACTIVE 0
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/* default cropping area */
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#define V4L2_SEL_TGT_CROP_DEFAULT 1
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/* cropping bounds */
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#define V4L2_SEL_TGT_CROP_BOUNDS 2
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/* current composing area */
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#define V4L2_SEL_TGT_COMPOSE_ACTIVE 256
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/* default composing area */
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#define V4L2_SEL_TGT_COMPOSE_DEFAULT 257
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/* composing bounds */
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#define V4L2_SEL_TGT_COMPOSE_BOUNDS 258
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/* current composing area plus all padding pixels */
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#define V4L2_SEL_TGT_COMPOSE_PADDED 259
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/**
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* struct v4l2_selection - selection info
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* @type: buffer type (do not use *_MPLANE types)
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* @target: selection target, used to choose one of possible rectangles
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* @flags: constraints flags
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* @r: coordinates of selection window
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* @reserved: for future use, rounds structure size to 64 bytes, set to zero
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*
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* Hardware may use multiple helper window to process a video stream.
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* The structure is used to exchange this selection areas between
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* an application and a driver.
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*/
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struct v4l2_selection {
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__u32 type;
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__u32 target;
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__u32 flags;
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struct v4l2_rect r;
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__u32 reserved[9];
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};
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/*
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* A N A L O G V I D E O S T A N D A R D
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*/
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@ -777,10 +818,10 @@ typedef __u64 v4l2_std_id;
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#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400)
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#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800)
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#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000)
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#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000)
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#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) /* BTSC */
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#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) /* EIA-J */
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#define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000)
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#define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000)
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#define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000) /* FM A2 */
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#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000)
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#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000)
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@ -804,47 +845,86 @@ typedef __u64 v4l2_std_id;
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v4l2-common.c should be fixed.
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*/
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/* some merged standards */
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#define V4L2_STD_MN (V4L2_STD_PAL_M|V4L2_STD_PAL_N|V4L2_STD_PAL_Nc|V4L2_STD_NTSC)
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#define V4L2_STD_B (V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_SECAM_B)
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#define V4L2_STD_GH (V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_SECAM_G|V4L2_STD_SECAM_H)
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#define V4L2_STD_DK (V4L2_STD_PAL_DK|V4L2_STD_SECAM_DK)
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/*
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* Some macros to merge video standards in order to make live easier for the
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* drivers and V4L2 applications
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*/
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/* some common needed stuff */
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#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\
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V4L2_STD_PAL_B1 |\
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V4L2_STD_PAL_G)
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#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\
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V4L2_STD_PAL_D1 |\
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V4L2_STD_PAL_K)
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#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\
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V4L2_STD_PAL_DK |\
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V4L2_STD_PAL_H |\
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V4L2_STD_PAL_I)
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/*
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* "Common" NTSC/M - It should be noticed that V4L2_STD_NTSC_443 is
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* Missing here.
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*/
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#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\
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V4L2_STD_NTSC_M_JP |\
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V4L2_STD_NTSC_M_KR)
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/* Secam macros */
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#define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\
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V4L2_STD_SECAM_K |\
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V4L2_STD_SECAM_K1)
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/* All Secam Standards */
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#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\
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V4L2_STD_SECAM_G |\
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V4L2_STD_SECAM_H |\
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V4L2_STD_SECAM_DK |\
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V4L2_STD_SECAM_L |\
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V4L2_STD_SECAM_LC)
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/* PAL macros */
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#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\
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V4L2_STD_PAL_B1 |\
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V4L2_STD_PAL_G)
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#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\
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V4L2_STD_PAL_D1 |\
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V4L2_STD_PAL_K)
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/*
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* "Common" PAL - This macro is there to be compatible with the old
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* V4L1 concept of "PAL": /BGDKHI.
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* Several PAL standards are mising here: /M, /N and /Nc
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*/
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#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\
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V4L2_STD_PAL_DK |\
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V4L2_STD_PAL_H |\
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V4L2_STD_PAL_I)
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/* Chroma "agnostic" standards */
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#define V4L2_STD_B (V4L2_STD_PAL_B |\
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V4L2_STD_PAL_B1 |\
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V4L2_STD_SECAM_B)
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#define V4L2_STD_G (V4L2_STD_PAL_G |\
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V4L2_STD_SECAM_G)
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#define V4L2_STD_H (V4L2_STD_PAL_H |\
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V4L2_STD_SECAM_H)
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#define V4L2_STD_L (V4L2_STD_SECAM_L |\
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V4L2_STD_SECAM_LC)
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#define V4L2_STD_GH (V4L2_STD_G |\
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||||
V4L2_STD_H)
|
||||
#define V4L2_STD_DK (V4L2_STD_PAL_DK |\
|
||||
V4L2_STD_SECAM_DK)
|
||||
#define V4L2_STD_BG (V4L2_STD_B |\
|
||||
V4L2_STD_G)
|
||||
#define V4L2_STD_MN (V4L2_STD_PAL_M |\
|
||||
V4L2_STD_PAL_N |\
|
||||
V4L2_STD_PAL_Nc |\
|
||||
V4L2_STD_NTSC)
|
||||
|
||||
/* Standards where MTS/BTSC stereo could be found */
|
||||
#define V4L2_STD_MTS (V4L2_STD_NTSC_M |\
|
||||
V4L2_STD_PAL_M |\
|
||||
V4L2_STD_PAL_N |\
|
||||
V4L2_STD_PAL_Nc)
|
||||
|
||||
/* Standards for Countries with 60Hz Line frequency */
|
||||
#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\
|
||||
V4L2_STD_PAL_60 |\
|
||||
V4L2_STD_NTSC |\
|
||||
V4L2_STD_NTSC_443)
|
||||
/* Standards for Countries with 50Hz Line frequency */
|
||||
#define V4L2_STD_625_50 (V4L2_STD_PAL |\
|
||||
V4L2_STD_PAL_N |\
|
||||
V4L2_STD_PAL_Nc |\
|
||||
V4L2_STD_SECAM)
|
||||
|
||||
#define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\
|
||||
V4L2_STD_ATSC_16_VSB)
|
||||
|
||||
/* Macros with none and all analog standards */
|
||||
#define V4L2_STD_UNKNOWN 0
|
||||
#define V4L2_STD_ALL (V4L2_STD_525_60 |\
|
||||
V4L2_STD_625_50)
|
||||
|
|
@ -1082,7 +1162,8 @@ struct v4l2_ext_controls {
|
|||
#define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */
|
||||
#define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */
|
||||
#define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */
|
||||
#define V4L2_CTRL_CLASS_CODEC 0x009c0000 /* Codec control class */
|
||||
#define V4L2_CTRL_CLASS_FLASH 0x009c0000 /* Camera flash controls */
|
||||
#define V4L2_CTRL_CLASS_FM_RX 0x009d0000 /* FM Tuner control class */
|
||||
|
||||
#define V4L2_CTRL_ID_MASK (0x0fffffff)
|
||||
#define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL)
|
||||
|
|
@ -1096,6 +1177,7 @@ enum v4l2_ctrl_type {
|
|||
V4L2_CTRL_TYPE_INTEGER64 = 5,
|
||||
V4L2_CTRL_TYPE_CTRL_CLASS = 6,
|
||||
V4L2_CTRL_TYPE_STRING = 7,
|
||||
V4L2_CTRL_TYPE_BITMASK = 8,
|
||||
};
|
||||
|
||||
/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
|
||||
|
|
@ -1127,11 +1209,13 @@ struct v4l2_querymenu {
|
|||
#define V4L2_CTRL_FLAG_INACTIVE 0x0010
|
||||
#define V4L2_CTRL_FLAG_SLIDER 0x0020
|
||||
#define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040
|
||||
#define V4L2_CTRL_FLAG_VOLATILE 0x0080
|
||||
|
||||
/* Query flag, to be ORed with the control ID */
|
||||
#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000
|
||||
|
||||
/* User-class control IDs defined by V4L2 */
|
||||
#define V4L2_CID_MAX_CTRLS 1024
|
||||
#define V4L2_CID_BASE (V4L2_CTRL_CLASS_USER | 0x900)
|
||||
#define V4L2_CID_USER_BASE V4L2_CID_BASE
|
||||
/* IDs reserved for driver specific controls */
|
||||
|
|
@ -1170,6 +1254,7 @@ enum v4l2_power_line_frequency {
|
|||
V4L2_CID_POWER_LINE_FREQUENCY_DISABLED = 0,
|
||||
V4L2_CID_POWER_LINE_FREQUENCY_50HZ = 1,
|
||||
V4L2_CID_POWER_LINE_FREQUENCY_60HZ = 2,
|
||||
V4L2_CID_POWER_LINE_FREQUENCY_AUTO = 3,
|
||||
};
|
||||
#define V4L2_CID_HUE_AUTO (V4L2_CID_BASE+25)
|
||||
#define V4L2_CID_WHITE_BALANCE_TEMPERATURE (V4L2_CID_BASE+26)
|
||||
|
|
@ -1201,37 +1286,19 @@ enum v4l2_colorfx {
|
|||
#define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37)
|
||||
#define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38)
|
||||
|
||||
/*
|
||||
* This is custom CID
|
||||
*/
|
||||
/* for rgb alpha function */
|
||||
#define V4L2_CID_GLOBAL_ALPHA (V4L2_CID_BASE+39)
|
||||
#define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE (V4L2_CID_BASE+39)
|
||||
#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT (V4L2_CID_BASE+40)
|
||||
|
||||
/* cacheable configuration */
|
||||
#define V4L2_CID_CACHEABLE (V4L2_CID_BASE+40)
|
||||
|
||||
/* jpeg captured size */
|
||||
#define V4L2_CID_CAM_JPEG_MEMSIZE (V4L2_CID_BASE+41)
|
||||
#define V4L2_CID_CAM_JPEG_ENCODEDSIZE (V4L2_CID_BASE+42)
|
||||
|
||||
#define V4L2_CID_SET_SHAREABLE (V4L2_CID_BASE+43)
|
||||
|
||||
/* TV configuration */
|
||||
#define V4L2_CID_TV_LAYER_BLEND_ENABLE (V4L2_CID_BASE+44)
|
||||
#define V4L2_CID_TV_LAYER_BLEND_ALPHA (V4L2_CID_BASE+45)
|
||||
#define V4L2_CID_TV_PIXEL_BLEND_ENABLE (V4L2_CID_BASE+46)
|
||||
#define V4L2_CID_TV_CHROMA_ENABLE (V4L2_CID_BASE+47)
|
||||
#define V4L2_CID_TV_CHROMA_VALUE (V4L2_CID_BASE+48)
|
||||
#define V4L2_CID_TV_HPD_STATUS (V4L2_CID_BASE+49)
|
||||
#define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41)
|
||||
|
||||
/* last CID + 1 */
|
||||
#define V4L2_CID_LASTP1 (V4L2_CID_BASE+50)
|
||||
#define V4L2_CID_LASTP1 (V4L2_CID_BASE+42)
|
||||
|
||||
/* MPEG-class control IDs defined by V4L2 */
|
||||
#define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900)
|
||||
#define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1)
|
||||
|
||||
/* MPEG streams */
|
||||
/* MPEG streams, specific to multiplexed streams */
|
||||
#define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0)
|
||||
enum v4l2_mpeg_stream_type {
|
||||
V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */
|
||||
|
|
@ -1253,7 +1320,7 @@ enum v4l2_mpeg_stream_vbi_fmt {
|
|||
V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */
|
||||
};
|
||||
|
||||
/* MPEG audio */
|
||||
/* MPEG audio controls specific to multiplexed streams */
|
||||
#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100)
|
||||
enum v4l2_mpeg_audio_sampling_freq {
|
||||
V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
|
||||
|
|
@ -1369,7 +1436,7 @@ enum v4l2_mpeg_audio_ac3_bitrate {
|
|||
V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
|
||||
};
|
||||
|
||||
/* MPEG video */
|
||||
/* MPEG video controls specific to multiplexed streams */
|
||||
#define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200)
|
||||
enum v4l2_mpeg_video_encoding {
|
||||
V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0,
|
||||
|
|
@ -1397,6 +1464,141 @@ enum v4l2_mpeg_video_bitrate_mode {
|
|||
#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209)
|
||||
#define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210)
|
||||
#define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211)
|
||||
#define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE (V4L2_CID_MPEG_BASE+212)
|
||||
#define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER (V4L2_CID_MPEG_BASE+213)
|
||||
#define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB (V4L2_CID_MPEG_BASE+214)
|
||||
#define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE (V4L2_CID_MPEG_BASE+215)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEADER_MODE (V4L2_CID_MPEG_BASE+216)
|
||||
enum v4l2_mpeg_video_header_mode {
|
||||
V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE = 0,
|
||||
V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME = 1,
|
||||
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (V4L2_CID_MPEG_BASE+217)
|
||||
#define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE (V4L2_CID_MPEG_BASE+218)
|
||||
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES (V4L2_CID_MPEG_BASE+219)
|
||||
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB (V4L2_CID_MPEG_BASE+220)
|
||||
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE (V4L2_CID_MPEG_BASE+221)
|
||||
enum v4l2_mpeg_video_multi_slice_mode {
|
||||
V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE = 0,
|
||||
V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB = 1,
|
||||
V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES = 2,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_VBV_SIZE (V4L2_CID_MPEG_BASE+222)
|
||||
#define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (V4L2_CID_MPEG_BASE+300)
|
||||
#define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (V4L2_CID_MPEG_BASE+301)
|
||||
#define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP (V4L2_CID_MPEG_BASE+302)
|
||||
#define V4L2_CID_MPEG_VIDEO_H263_MIN_QP (V4L2_CID_MPEG_BASE+303)
|
||||
#define V4L2_CID_MPEG_VIDEO_H263_MAX_QP (V4L2_CID_MPEG_BASE+304)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP (V4L2_CID_MPEG_BASE+350)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP (V4L2_CID_MPEG_BASE+351)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP (V4L2_CID_MPEG_BASE+352)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_MIN_QP (V4L2_CID_MPEG_BASE+353)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_MAX_QP (V4L2_CID_MPEG_BASE+354)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM (V4L2_CID_MPEG_BASE+355)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE (V4L2_CID_MPEG_BASE+356)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE (V4L2_CID_MPEG_BASE+357)
|
||||
enum v4l2_mpeg_video_h264_entropy_mode {
|
||||
V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC = 0,
|
||||
V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC = 1,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD (V4L2_CID_MPEG_BASE+358)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_LEVEL (V4L2_CID_MPEG_BASE+359)
|
||||
enum v4l2_mpeg_video_h264_level {
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_1_0 = 0,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_1B = 1,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_1_1 = 2,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_1_2 = 3,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_1_3 = 4,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_2_0 = 5,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_2_1 = 6,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_2_2 = 7,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_3_0 = 8,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_3_1 = 9,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_3_2 = 10,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_4_0 = 11,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_4_1 = 12,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14,
|
||||
V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE (V4L2_CID_MPEG_BASE+362)
|
||||
enum v4l2_mpeg_video_h264_loop_filter_mode {
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED = 0,
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED = 1,
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY = 2,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_PROFILE (V4L2_CID_MPEG_BASE+363)
|
||||
enum v4l2_mpeg_video_h264_profile {
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE = 0,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE = 1,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_MAIN = 2,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED = 3,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH = 4,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10 = 5,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422 = 6,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE = 7,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA = 8,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA = 9,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA = 10,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA = 11,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE = 12,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH = 13,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE (V4L2_CID_MPEG_BASE+366)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC (V4L2_CID_MPEG_BASE+367)
|
||||
enum v4l2_mpeg_video_h264_vui_sar_idc {
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED = 0,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 = 1,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 = 2,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 = 3,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 = 4,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 = 5,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 = 6,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 = 7,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 = 8,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 = 9,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 = 10,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 = 11,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 = 12,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 = 13,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 = 14,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 = 15,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 = 16,
|
||||
V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED = 17,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (V4L2_CID_MPEG_BASE+400)
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (V4L2_CID_MPEG_BASE+401)
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (V4L2_CID_MPEG_BASE+402)
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP (V4L2_CID_MPEG_BASE+403)
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP (V4L2_CID_MPEG_BASE+404)
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL (V4L2_CID_MPEG_BASE+405)
|
||||
enum v4l2_mpeg_video_mpeg4_level {
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 = 0,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B = 1,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 = 2,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 = 3,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 = 4,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B = 5,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 = 6,
|
||||
V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 = 7,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE (V4L2_CID_MPEG_BASE+406)
|
||||
enum v4l2_mpeg_video_mpeg4_profile {
|
||||
V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE = 0,
|
||||
V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE = 1,
|
||||
V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE = 2,
|
||||
V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE = 3,
|
||||
V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY = 4,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (V4L2_CID_MPEG_BASE+407)
|
||||
|
||||
/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
|
||||
#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
|
||||
|
|
@ -1439,202 +1641,32 @@ enum v4l2_mpeg_cx2341x_video_median_filter_type {
|
|||
#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10)
|
||||
#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11)
|
||||
|
||||
/* For codecs */
|
||||
/* MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */
|
||||
#define V4L2_CID_MPEG_MFC51_BASE (V4L2_CTRL_CLASS_MPEG | 0x1100)
|
||||
|
||||
#define V4L2_CID_CODEC_BASE (V4L2_CTRL_CLASS_CODEC | 0x900)
|
||||
#define V4L2_CID_CODEC_CLASS (V4L2_CTRL_CLASS_CODEC | 1)
|
||||
|
||||
/* Codec class control IDs specific to the MFC5X driver */
|
||||
#define V4L2_CID_CODEC_MFC5X_BASE (V4L2_CTRL_CLASS_CODEC | 0x1000)
|
||||
|
||||
/* For both decoding and encoding */
|
||||
|
||||
/* For decoding */
|
||||
|
||||
#define V4L2_CID_CODEC_LOOP_FILTER_MPEG4_ENABLE (V4L2_CID_CODEC_BASE + 110)
|
||||
#define V4L2_CID_CODEC_DISPLAY_DELAY (V4L2_CID_CODEC_BASE + 137)
|
||||
#define V4L2_CID_CODEC_REQ_NUM_BUFS (V4L2_CID_CODEC_BASE + 140)
|
||||
#define V4L2_CID_CODEC_SLICE_INTERFACE (V4L2_CID_CODEC_BASE + 141)
|
||||
#define V4L2_CID_CODEC_PACKED_PB (V4L2_CID_CODEC_BASE + 142)
|
||||
#define V4L2_CID_CODEC_FRAME_TAG (V4L2_CID_CODEC_BASE + 143)
|
||||
#define V4L2_CID_CODEC_CRC_ENABLE (V4L2_CID_CODEC_BASE + 144)
|
||||
#define V4L2_CID_CODEC_CRC_DATA_LUMA (V4L2_CID_CODEC_BASE + 145)
|
||||
#define V4L2_CID_CODEC_CRC_DATA_CHROMA (V4L2_CID_CODEC_BASE + 146)
|
||||
#define V4L2_CID_CODEC_CRC_DATA_LUMA_BOT (V4L2_CID_CODEC_BASE + 147)
|
||||
#define V4L2_CID_CODEC_CRC_DATA_CHROMA_BOT (V4L2_CID_CODEC_BASE + 148)
|
||||
#define V4L2_CID_CODEC_CRC_GENERATED (V4L2_CID_CODEC_BASE + 149)
|
||||
#define V4L2_CID_CODEC_FRAME_TYPE (V4L2_CID_CODEC_BASE + 154)
|
||||
#define V4L2_CID_CODEC_CHECK_STATE (V4L2_CID_CODEC_BASE + 155)
|
||||
#define V4L2_CID_CODEC_DISPLAY_STATUS (V4L2_CID_CODEC_BASE + 156)
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_SEI_PARSE (V4L2_CID_CODEC_BASE + 157)
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_SEI_AVAIL (V4L2_CID_CODEC_BASE + 158)
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_ARRGMENT_ID (V4L2_CID_CODEC_BASE + 159)
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_SEI_INFO (V4L2_CID_CODEC_BASE + 160)
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_GRID_POS (V4L2_CID_CODEC_BASE + 161)
|
||||
|
||||
/* For encoding */
|
||||
#define V4L2_CID_CODEC_LOOP_FILTER_H264 (V4L2_CID_CODEC_BASE + 9)
|
||||
enum v4l2_cid_codec_loop_filter_h264 {
|
||||
V4L2_CID_CODEC_LOOP_FILTER_H264_ENABLE = 0,
|
||||
V4L2_CID_CODEC_LOOP_FILTER_H264_DISABLE = 1,
|
||||
V4L2_CID_CODEC_LOOP_FILTER_H264_DISABLE_AT_BOUNDARY = 2,
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY (V4L2_CID_MPEG_MFC51_BASE+0)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE (V4L2_CID_MPEG_MFC51_BASE+1)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE (V4L2_CID_MPEG_MFC51_BASE+2)
|
||||
enum v4l2_mpeg_mfc51_video_frame_skip_mode {
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED = 0,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT = 1,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT = 2,
|
||||
};
|
||||
|
||||
#define V4L2_CID_CODEC_FRAME_INSERTION (V4L2_CID_CODEC_BASE + 10)
|
||||
enum v4l2_cid_codec_frame_insertion {
|
||||
V4L2_CID_CODEC_FRAME_INSERT_NONE = 0x0,
|
||||
V4L2_CID_CODEC_FRAME_INSERT_I_FRAME = 0x1,
|
||||
V4L2_CID_CODEC_FRAME_INSERT_NOT_CODED = 0x2,
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE (V4L2_CID_MPEG_MFC51_BASE+3)
|
||||
enum v4l2_mpeg_mfc51_video_force_frame_type {
|
||||
V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED = 0,
|
||||
V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME = 1,
|
||||
V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED = 2,
|
||||
};
|
||||
|
||||
#define V4L2_CID_CODEC_ENCODED_LUMA_ADDR (V4L2_CID_CODEC_BASE + 11)
|
||||
#define V4L2_CID_CODEC_ENCODED_CHROMA_ADDR (V4L2_CID_CODEC_BASE + 12)
|
||||
|
||||
#define V4L2_CID_CODEC_ENCODED_I_PERIOD_CH V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE
|
||||
#define V4L2_CID_CODEC_ENCODED_FRAME_RATE_CH V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE
|
||||
#define V4L2_CID_CODEC_ENCODED_BIT_RATE_CH V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE
|
||||
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_SEI_GEN (V4L2_CID_CODEC_BASE + 13)
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_FRM0_FLAG (V4L2_CID_CODEC_BASE + 14)
|
||||
enum v4l2_codec_mfc5x_enc_flag {
|
||||
V4L2_CODEC_MFC5X_ENC_FLAG_DISABLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_FLAG_ENABLE = 1,
|
||||
};
|
||||
#define V4L2_CID_CODEC_FRAME_PACK_ARRGMENT_TYPE (V4L2_CID_CODEC_BASE + 15)
|
||||
enum v4l2_codec_mfc5x_enc_frame_pack_arrgment_type {
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_PACK_SIDE_BY_SIDE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_PACK_TOP_AND_BOT = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_PACK_TMP_INTER = 2,
|
||||
};
|
||||
|
||||
/* common */
|
||||
enum v4l2_codec_mfc5x_enc_switch {
|
||||
V4L2_CODEC_MFC5X_ENC_SW_DISABLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_SW_ENABLE = 1,
|
||||
};
|
||||
enum v4l2_codec_mfc5x_enc_switch_inv {
|
||||
V4L2_CODEC_MFC5X_ENC_SW_INV_ENABLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_SW_INV_DISABLE = 1,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE (V4L2_CID_CODEC_MFC5X_BASE+300)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MODE (V4L2_CID_CODEC_MFC5X_BASE+301)
|
||||
enum v4l2_codec_mfc5x_enc_multi_slice_mode {
|
||||
V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_DISABLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_MACROBLOCK_COUNT = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_BIT_COUNT = 3,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MB (V4L2_CID_CODEC_MFC5X_BASE+302)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_BIT (V4L2_CID_CODEC_MFC5X_BASE+303)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_INTRA_REFRESH_MB (V4L2_CID_CODEC_MFC5X_BASE+304)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CTRL_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+305)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_PAD_LUMA_VALUE (V4L2_CID_CODEC_MFC5X_BASE+306)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CB_VALUE (V4L2_CID_CODEC_MFC5X_BASE+307)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CR_VALUE (V4L2_CID_CODEC_MFC5X_BASE+308)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_RC_FRAME_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+309)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE (V4L2_CID_CODEC_MFC5X_BASE+310)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_RC_REACTION_COEFF (V4L2_CID_CODEC_MFC5X_BASE+311)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_STREAM_SIZE (V4L2_CID_CODEC_MFC5X_BASE+312)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_COUNT (V4L2_CID_CODEC_MFC5X_BASE+313)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_TYPE (V4L2_CID_CODEC_MFC5X_BASE+314)
|
||||
enum v4l2_codec_mfc5x_enc_frame_type {
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_NOT_CODED = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_I_FRAME = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_P_FRAME = 2,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_B_FRAME = 3,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_SKIPPED = 4,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_OTHERS = 5,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE (V4L2_CID_CODEC_MFC5X_BASE+315)
|
||||
enum v4l2_codec_mfc5x_enc_force_frame_type {
|
||||
V4L2_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE_I_FRAME = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE_NOT_CODED = 2,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_VBV_BUF_SIZE (V4L2_CID_CODEC_MFC5X_BASE+316)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_SEQ_HDR_MODE (V4L2_CID_CODEC_MFC5X_BASE+317)
|
||||
enum v4l2_codec_mfc5x_enc_seq_hdr_mode {
|
||||
V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ_FRAME = 1,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_SKIP_MODE (V4L2_CID_CODEC_MFC5X_BASE+318)
|
||||
enum v4l2_codec_mfc5x_enc_frame_skip_mode {
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_DISABLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_LEVEL = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_VBV_BUF_SIZE = 2,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_RC_FIXED_TARGET_BIT (V4L2_CID_CODEC_MFC5X_BASE+319)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_DELTA (V4L2_CID_CODEC_MFC5X_BASE+320)
|
||||
|
||||
/* codec specific */
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_B_FRAMES (V4L2_CID_CODEC_MFC5X_BASE+400)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_PROFILE (V4L2_CID_CODEC_MFC5X_BASE+401)
|
||||
enum v4l2_codec_mfc5x_enc_h264_profile {
|
||||
V4L2_CODEC_MFC5X_ENC_H264_PROFILE_MAIN = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_H264_PROFILE_HIGH = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_H264_PROFILE_BASELINE = 2,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LEVEL (V4L2_CID_CODEC_MFC5X_BASE+402)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_INTERLACE (V4L2_CID_CODEC_MFC5X_BASE+403)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_MODE (V4L2_CID_CODEC_MFC5X_BASE+404)
|
||||
enum v4l2_codec_mfc5x_enc_h264_loop_filter {
|
||||
V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ENABLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_DISABLE = 1,
|
||||
V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_DISABLE_AT_BOUNDARY = 2,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ALPHA (V4L2_CID_CODEC_MFC5X_BASE+405)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_BETA (V4L2_CID_CODEC_MFC5X_BASE+406)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_ENTROPY_MODE (V4L2_CID_CODEC_MFC5X_BASE+407)
|
||||
enum v4l2_codec_mfc5x_enc_h264_entropy_mode {
|
||||
V4L2_CODEC_MFC5X_ENC_H264_ENTROPY_MODE_CAVLC = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_H264_ENTROPY_MODE_CABAC = 1,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_MAX_REF_PIC (V4L2_CID_CODEC_MFC5X_BASE+408)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_NUM_REF_PIC_4P (V4L2_CID_CODEC_MFC5X_BASE+409)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_8X8_TRANSFORM (V4L2_CID_CODEC_MFC5X_BASE+410)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+411)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE (V4L2_CID_CODEC_MFC5X_BASE+412)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+413)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MIN_QP (V4L2_CID_CODEC_MFC5X_BASE+414)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MAX_QP (V4L2_CID_CODEC_MFC5X_BASE+415)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_DARK (V4L2_CID_CODEC_MFC5X_BASE+416)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_SMOOTH (V4L2_CID_CODEC_MFC5X_BASE+417)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_STATIC (V4L2_CID_CODEC_MFC5X_BASE+418)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ACTIVITY (V4L2_CID_CODEC_MFC5X_BASE+419)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_P_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+420)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_B_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+421)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+422)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_IDC (V4L2_CID_CODEC_MFC5X_BASE+423)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_WIDTH (V4L2_CID_CODEC_MFC5X_BASE+424)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_HEIGHT (V4L2_CID_CODEC_MFC5X_BASE+425)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_OPEN_GOP (V4L2_CID_CODEC_MFC5X_BASE+426)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_I_PERIOD (V4L2_CID_CODEC_MFC5X_BASE+427)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_HIER_P_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+428)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER0_QP (V4L2_CID_CODEC_MFC5X_BASE+429)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER1_QP (V4L2_CID_CODEC_MFC5X_BASE+430)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER2_QP (V4L2_CID_CODEC_MFC5X_BASE+431)
|
||||
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_B_FRAMES (V4L2_CID_CODEC_MFC5X_BASE+440)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_PROFILE (V4L2_CID_CODEC_MFC5X_BASE+441)
|
||||
enum v4l2_codec_mfc5x_enc_mpeg4_profile {
|
||||
V4L2_CODEC_MFC5X_ENC_MPEG4_PROFILE_SIMPLE = 0,
|
||||
V4L2_CODEC_MFC5X_ENC_MPEG4_PROFILE_ADVANCED_SIMPLE = 1,
|
||||
};
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_LEVEL (V4L2_CID_CODEC_MFC5X_BASE+442)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+443)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MIN_QP (V4L2_CID_CODEC_MFC5X_BASE+444)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MAX_QP (V4L2_CID_CODEC_MFC5X_BASE+445)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_QUARTER_PIXEL (V4L2_CID_CODEC_MFC5X_BASE+446)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_P_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+447)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_B_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+448)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_TIME_RES (V4L2_CID_CODEC_MFC5X_BASE+449)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_FRM_DELTA (V4L2_CID_CODEC_MFC5X_BASE+450)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MB_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+451)
|
||||
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_RATE (V4L2_CID_CODEC_MFC5X_BASE+460)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+461)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MIN_QP (V4L2_CID_CODEC_MFC5X_BASE+462)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MAX_QP (V4L2_CID_CODEC_MFC5X_BASE+463)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_P_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+464)
|
||||
#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MB_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+465)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING (V4L2_CID_MPEG_MFC51_BASE+4)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV (V4L2_CID_MPEG_MFC51_BASE+5)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT (V4L2_CID_MPEG_MFC51_BASE+6)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF (V4L2_CID_MPEG_MFC51_BASE+7)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY (V4L2_CID_MPEG_MFC51_BASE+50)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK (V4L2_CID_MPEG_MFC51_BASE+51)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH (V4L2_CID_MPEG_MFC51_BASE+52)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
|
||||
|
||||
/* Camera class control IDs */
|
||||
#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
|
||||
|
|
@ -1703,6 +1735,53 @@ enum v4l2_preemphasis {
|
|||
};
|
||||
#define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113)
|
||||
#define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114)
|
||||
/* FM Tuner class control IDs */
|
||||
#define V4L2_CID_FM_RX_CLASS_BASE (V4L2_CTRL_CLASS_FM_RX | 0x900)
|
||||
#define V4L2_CID_FM_RX_CLASS (V4L2_CTRL_CLASS_FM_RX | 1)
|
||||
|
||||
#define V4L2_CID_TUNE_DEEMPHASIS (V4L2_CID_FM_RX_CLASS_BASE + 1)
|
||||
enum v4l2_deemphasis {
|
||||
V4L2_DEEMPHASIS_DISABLED = 0,
|
||||
V4L2_DEEMPHASIS_50_uS = 1,
|
||||
V4L2_DEEMPHASIS_75_uS = 2,
|
||||
};
|
||||
|
||||
/* Flash and privacy (indicator) light controls */
|
||||
#define V4L2_CID_FLASH_CLASS_BASE (V4L2_CTRL_CLASS_FLASH | 0x900)
|
||||
#define V4L2_CID_FLASH_CLASS (V4L2_CTRL_CLASS_FLASH | 1)
|
||||
|
||||
#define V4L2_CID_FLASH_LED_MODE (V4L2_CID_FLASH_CLASS_BASE + 1)
|
||||
enum v4l2_flash_led_mode {
|
||||
V4L2_FLASH_LED_MODE_NONE,
|
||||
V4L2_FLASH_LED_MODE_FLASH,
|
||||
V4L2_FLASH_LED_MODE_TORCH,
|
||||
};
|
||||
|
||||
#define V4L2_CID_FLASH_STROBE_SOURCE (V4L2_CID_FLASH_CLASS_BASE + 2)
|
||||
enum v4l2_flash_strobe_source {
|
||||
V4L2_FLASH_STROBE_SOURCE_SOFTWARE,
|
||||
V4L2_FLASH_STROBE_SOURCE_EXTERNAL,
|
||||
};
|
||||
|
||||
#define V4L2_CID_FLASH_STROBE (V4L2_CID_FLASH_CLASS_BASE + 3)
|
||||
#define V4L2_CID_FLASH_STROBE_STOP (V4L2_CID_FLASH_CLASS_BASE + 4)
|
||||
#define V4L2_CID_FLASH_STROBE_STATUS (V4L2_CID_FLASH_CLASS_BASE + 5)
|
||||
|
||||
#define V4L2_CID_FLASH_TIMEOUT (V4L2_CID_FLASH_CLASS_BASE + 6)
|
||||
#define V4L2_CID_FLASH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 7)
|
||||
#define V4L2_CID_FLASH_TORCH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 8)
|
||||
#define V4L2_CID_FLASH_INDICATOR_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 9)
|
||||
|
||||
#define V4L2_CID_FLASH_FAULT (V4L2_CID_FLASH_CLASS_BASE + 10)
|
||||
#define V4L2_FLASH_FAULT_OVER_VOLTAGE (1 << 0)
|
||||
#define V4L2_FLASH_FAULT_TIMEOUT (1 << 1)
|
||||
#define V4L2_FLASH_FAULT_OVER_TEMPERATURE (1 << 2)
|
||||
#define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3)
|
||||
#define V4L2_FLASH_FAULT_OVER_CURRENT (1 << 4)
|
||||
#define V4L2_FLASH_FAULT_INDICATOR (1 << 5)
|
||||
|
||||
#define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11)
|
||||
#define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12)
|
||||
|
||||
/*
|
||||
* T U N I N G
|
||||
|
|
@ -2068,6 +2147,8 @@ struct v4l2_streamparm {
|
|||
#define V4L2_EVENT_ALL 0
|
||||
#define V4L2_EVENT_VSYNC 1
|
||||
#define V4L2_EVENT_EOS 2
|
||||
#define V4L2_EVENT_CTRL 3
|
||||
#define V4L2_EVENT_FRAME_SYNC 4
|
||||
#define V4L2_EVENT_PRIVATE_START 0x08000000
|
||||
|
||||
/* Payload for V4L2_EVENT_VSYNC */
|
||||
|
|
@ -2076,21 +2157,51 @@ struct v4l2_event_vsync {
|
|||
__u8 field;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Payload for V4L2_EVENT_CTRL */
|
||||
#define V4L2_EVENT_CTRL_CH_VALUE (1 << 0)
|
||||
#define V4L2_EVENT_CTRL_CH_FLAGS (1 << 1)
|
||||
|
||||
struct v4l2_event_ctrl {
|
||||
__u32 changes;
|
||||
__u32 type;
|
||||
union {
|
||||
__s32 value;
|
||||
__s64 value64;
|
||||
};
|
||||
__u32 flags;
|
||||
__s32 minimum;
|
||||
__s32 maximum;
|
||||
__s32 step;
|
||||
__s32 default_value;
|
||||
};
|
||||
|
||||
struct v4l2_event_frame_sync {
|
||||
__u32 frame_sequence;
|
||||
};
|
||||
|
||||
struct v4l2_event {
|
||||
__u32 type;
|
||||
union {
|
||||
struct v4l2_event_vsync vsync;
|
||||
struct v4l2_event_ctrl ctrl;
|
||||
struct v4l2_event_frame_sync frame_sync;
|
||||
__u8 data[64];
|
||||
} u;
|
||||
__u32 pending;
|
||||
__u32 sequence;
|
||||
struct timespec timestamp;
|
||||
__u32 reserved[9];
|
||||
__u32 id;
|
||||
__u32 reserved[8];
|
||||
};
|
||||
|
||||
#define V4L2_EVENT_SUB_FL_SEND_INITIAL (1 << 0)
|
||||
#define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK (1 << 1)
|
||||
|
||||
struct v4l2_event_subscription {
|
||||
__u32 type;
|
||||
__u32 reserved[7];
|
||||
__u32 id;
|
||||
__u32 flags;
|
||||
__u32 reserved[5];
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -2129,6 +2240,23 @@ struct v4l2_dbg_chip_ident {
|
|||
__u32 revision; /* chip revision, chip specific */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/**
|
||||
* struct v4l2_create_buffers - VIDIOC_CREATE_BUFS argument
|
||||
* @index: on return, index of the first created buffer
|
||||
* @count: entry: number of requested buffers,
|
||||
* return: number of created buffers
|
||||
* @memory: buffer memory type
|
||||
* @format: frame format, for which buffers are requested
|
||||
* @reserved: future extensions
|
||||
*/
|
||||
struct v4l2_create_buffers {
|
||||
__u32 index;
|
||||
__u32 count;
|
||||
enum v4l2_memory memory;
|
||||
struct v4l2_format format;
|
||||
__u32 reserved[8];
|
||||
};
|
||||
|
||||
/*
|
||||
* I O C T L C O D E S F O R V I D E O D E V I C E S
|
||||
*
|
||||
|
|
@ -2219,6 +2347,15 @@ struct v4l2_dbg_chip_ident {
|
|||
#define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription)
|
||||
#define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription)
|
||||
|
||||
/* Experimental, the below two ioctls may change over the next couple of kernel
|
||||
versions */
|
||||
#define VIDIOC_CREATE_BUFS _IOWR('V', 92, struct v4l2_create_buffers)
|
||||
#define VIDIOC_PREPARE_BUF _IOWR('V', 93, struct v4l2_buffer)
|
||||
|
||||
/* Experimental selection API */
|
||||
#define VIDIOC_G_SELECTION _IOWR('V', 94, struct v4l2_selection)
|
||||
#define VIDIOC_S_SELECTION _IOWR('V', 95, struct v4l2_selection)
|
||||
|
||||
/* Reminder: when adding new ioctls please add support for them to
|
||||
drivers/media/video/v4l2-compat-ioctl32.c as well! */
|
||||
|
||||
|
|
|
|||
2076
exynos4/hal/include/videodev2_exynos_camera.h
Normal file
2076
exynos4/hal/include/videodev2_exynos_camera.h
Normal file
File diff suppressed because it is too large
Load diff
225
exynos4/hal/include/videodev2_exynos_media.h
Normal file
225
exynos4/hal/include/videodev2_exynos_media.h
Normal file
|
|
@ -0,0 +1,225 @@
|
|||
/*
|
||||
* Video for Linux Two header file for Exynos
|
||||
*
|
||||
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This header file contains several v4l2 APIs to be proposed to v4l2
|
||||
* community and until being accepted, will be used restrictly for Exynos.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_VIDEODEV2_EXYNOS_H
|
||||
#define __LINUX_VIDEODEV2_EXYNOS_H
|
||||
|
||||
/* Pixel format FOURCC depth Description */
|
||||
|
||||
/* two planes -- one Y, one Cr + Cb interleaved */
|
||||
#define V4L2_PIX_FMT_YUV444_2P v4l2_fourcc('Y', 'U', '2', 'P') /* 24 Y/CbCr */
|
||||
#define V4L2_PIX_FMT_YVU444_2P v4l2_fourcc('Y', 'V', '2', 'P') /* 24 Y/CrCb */
|
||||
|
||||
/* three planes -- one Y, one Cr, one Cb */
|
||||
#define V4L2_PIX_FMT_YUV444_3P v4l2_fourcc('Y', 'U', '3', 'P') /* 24 Y/Cb/Cr */
|
||||
|
||||
/* two non contiguous planes - one Y, one Cr + Cb interleaved */
|
||||
/* 21 Y/CrCb 4:2:0 */
|
||||
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1')
|
||||
/* 12 Y/CbCr 4:2:0 16x16 macroblocks */
|
||||
#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2')
|
||||
|
||||
/* three non contiguous planes - Y, Cb, Cr */
|
||||
/* 12 YVU420 planar */
|
||||
#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'V', 'U', 'M')
|
||||
|
||||
/* compressed formats */
|
||||
#define V4L2_PIX_FMT_H264_MVC v4l2_fourcc('M', '2', '6', '4') /* H264 MVC */
|
||||
#define V4L2_PIX_FMT_FIMV v4l2_fourcc('F', 'I', 'M', 'V') /* FIMV */
|
||||
#define V4L2_PIX_FMT_FIMV1 v4l2_fourcc('F', 'I', 'M', '1') /* FIMV1 */
|
||||
#define V4L2_PIX_FMT_FIMV2 v4l2_fourcc('F', 'I', 'M', '2') /* FIMV2 */
|
||||
#define V4L2_PIX_FMT_FIMV3 v4l2_fourcc('F', 'I', 'M', '3') /* FIMV3 */
|
||||
#define V4L2_PIX_FMT_FIMV4 v4l2_fourcc('F', 'I', 'M', '4') /* FIMV4 */
|
||||
#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
|
||||
|
||||
/* yuv444 of JFIF JPEG */
|
||||
#define V4L2_PIX_FMT_JPEG_444 v4l2_fourcc('J', 'P', 'G', '4')
|
||||
/* yuv422 of JFIF JPEG */
|
||||
#define V4L2_PIX_FMT_JPEG_422 v4l2_fourcc('J', 'P', 'G', '2')
|
||||
/* yuv420 of JFIF JPEG */
|
||||
#define V4L2_PIX_FMT_JPEG_420 v4l2_fourcc('J', 'P', 'G', '0')
|
||||
/* grey of JFIF JPEG */
|
||||
#define V4L2_PIX_FMT_JPEG_GRAY v4l2_fourcc('J', 'P', 'G', 'G')
|
||||
|
||||
/*
|
||||
* C O N T R O L S
|
||||
*/
|
||||
/* CID base for Exynos controls (USER_CLASS) */
|
||||
#define V4L2_CID_EXYNOS_BASE (V4L2_CTRL_CLASS_USER | 0x2000)
|
||||
|
||||
/* for rgb alpha function */
|
||||
#define V4L2_CID_GLOBAL_ALPHA (V4L2_CID_EXYNOS_BASE + 1)
|
||||
|
||||
/* cacheable configuration */
|
||||
#define V4L2_CID_CACHEABLE (V4L2_CID_EXYNOS_BASE + 10)
|
||||
|
||||
/* jpeg captured size */
|
||||
#define V4L2_CID_CAM_JPEG_MEMSIZE (V4L2_CID_EXYNOS_BASE + 20)
|
||||
#define V4L2_CID_CAM_JPEG_ENCODEDSIZE (V4L2_CID_EXYNOS_BASE + 21)
|
||||
|
||||
#define V4L2_CID_SET_SHAREABLE (V4L2_CID_EXYNOS_BASE + 40)
|
||||
|
||||
/* TV configuration */
|
||||
#define V4L2_CID_TV_LAYER_BLEND_ENABLE (V4L2_CID_EXYNOS_BASE + 50)
|
||||
#define V4L2_CID_TV_LAYER_BLEND_ALPHA (V4L2_CID_EXYNOS_BASE + 51)
|
||||
#define V4L2_CID_TV_PIXEL_BLEND_ENABLE (V4L2_CID_EXYNOS_BASE + 52)
|
||||
#define V4L2_CID_TV_CHROMA_ENABLE (V4L2_CID_EXYNOS_BASE + 53)
|
||||
#define V4L2_CID_TV_CHROMA_VALUE (V4L2_CID_EXYNOS_BASE + 54)
|
||||
#define V4L2_CID_TV_HPD_STATUS (V4L2_CID_EXYNOS_BASE + 55)
|
||||
#define V4L2_CID_TV_LAYER_PRIO (V4L2_CID_EXYNOS_BASE + 56)
|
||||
#define V4L2_CID_TV_SET_DVI_MODE (V4L2_CID_EXYNOS_BASE + 57)
|
||||
|
||||
/* for color space conversion equation selection */
|
||||
#define V4L2_CID_CSC_EQ_MODE (V4L2_CID_EXYNOS_BASE + 100)
|
||||
#define V4L2_CID_CSC_EQ (V4L2_CID_EXYNOS_BASE + 101)
|
||||
#define V4L2_CID_CSC_RANGE (V4L2_CID_EXYNOS_BASE + 102)
|
||||
|
||||
/* for DRM playback scenario */
|
||||
#define V4L2_CID_USE_SYSMMU (V4L2_CID_EXYNOS_BASE + 200)
|
||||
#define V4L2_CID_M2M_CTX_NUM (V4L2_CID_EXYNOS_BASE + 201)
|
||||
|
||||
/* CID base for MFC controls (MPEG_CLASS) */
|
||||
#define V4L2_CID_MPEG_MFC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000)
|
||||
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_AVAIL \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 1)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRGMENT_ID \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 2)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_INFO \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 3)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_GRID_POS \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 4)
|
||||
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_PACKED_PB \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 5)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_TAG \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 6)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CRC_ENABLE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 7)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CRC_DATA_LUMA \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 8)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CRC_DATA_CHROMA \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 9)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CRC_DATA_LUMA_BOT \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 10)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CRC_DATA_CHROMA_BOT \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 11)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CRC_GENERATED \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 12)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CHECK_STATE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 13)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_DISPLAY_STATUS \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 14)
|
||||
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_LUMA_ADDR \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 15)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_CHROMA_ADDR \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 16)
|
||||
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_STREAM_SIZE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 17)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_COUNT \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 18)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_TYPE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 19)
|
||||
enum v4l2_mpeg_mfc51_video_frame_type {
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_TYPE_NOT_CODED = 0,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_TYPE_I_FRAME = 1,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_TYPE_P_FRAME = 2,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_TYPE_B_FRAME = 3,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_TYPE_SKIPPED = 4,
|
||||
V4L2_MPEG_MFC51_VIDEO_FRAME_TYPE_OTHERS = 5,
|
||||
};
|
||||
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_INTERLACE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 20)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_RC_FRAME_RATE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 21)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_MPEG4_VOP_TIME_RES \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 22)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_MPEG4_VOP_FRM_DELTA \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 23)
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_H263_RC_FRAME_RATE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 24)
|
||||
|
||||
#define V4L2_CID_MPEG_MFC6X_VIDEO_FRAME_DELTA \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 25)
|
||||
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_I_PERIOD_CH V4L2_CID_MPEG_VIDEO_GOP_SIZE
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_RATE_CH \
|
||||
V4L2_CID_MPEG_MFC51_VIDEO_H264_RC_FRAME_RATE
|
||||
#define V4L2_CID_MPEG_MFC51_VIDEO_BIT_RATE_CH V4L2_CID_MPEG_VIDEO_BITRATE
|
||||
|
||||
/* proposed CIDs, based on 3.3-rc3 */
|
||||
#define V4L2_CID_MPEG_VIDEO_VBV_DELAY (V4L2_CID_MPEG_MFC_BASE + 26)
|
||||
|
||||
#define V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_S_B \
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY
|
||||
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 27)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0 \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 28)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 29)
|
||||
enum v4l2_mpeg_video_h264_sei_fp_arrangement_type {
|
||||
V4L2_MPEG_VIDEO_H264_SEI_FP_TYPE_CHEKERBOARD = 0,
|
||||
V4L2_MPEG_VIDEO_H264_SEI_FP_TYPE_COLUMN = 1,
|
||||
V4L2_MPEG_VIDEO_H264_SEI_FP_TYPE_ROW = 2,
|
||||
V4L2_MPEG_VIDEO_H264_SEI_FP_TYPE_SIDE_BY_SIDE = 3,
|
||||
V4L2_MPEG_VIDEO_H264_SEI_FP_TYPE_TOP_BOTTOM = 4,
|
||||
V4L2_MPEG_VIDEO_H264_SEI_FP_TYPE_TEMPORAL = 5,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_FMO (V4L2_CID_MPEG_MFC_BASE + 30)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE (V4L2_CID_MPEG_MFC_BASE + 31)
|
||||
enum v4l2_mpeg_video_h264_fmo_map_type {
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_INTERLEAVED_SLICES = 0,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_SCATTERED_SLICES = 1,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_FOREGROUND_WITH_LEFT_OVER = 2,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_BOX_OUT = 3,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_RASTER_SCAN = 4,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN = 5,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_EXPLICIT = 6,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 32)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 33)
|
||||
enum v4l2_mpeg_video_h264_fmo_change_dir {
|
||||
V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_RIGHT = 0,
|
||||
V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_LEFT = 1,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 34)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 35)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_ASO \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 36)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 37)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 38)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 39)
|
||||
enum v4l2_mpeg_video_h264_hierarchical_coding_type {
|
||||
V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B = 0,
|
||||
V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P = 1,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 40)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 41)
|
||||
#define V4L2_CID_MPEG_VIDEO_H264_MVC_VIEW_ID \
|
||||
(V4L2_CID_MPEG_MFC_BASE + 42)
|
||||
#endif /* __LINUX_VIDEODEV2_EXYNOS_H */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -36,7 +36,8 @@
|
|||
#include <utils/RefBase.h>
|
||||
#include <hardware/camera.h>
|
||||
#include <videodev2.h>
|
||||
#include <videodev2_samsung.h>
|
||||
#include <videodev2_exynos_camera.h>
|
||||
#include <videodev2_exynos_media.h>
|
||||
#include "sec_utils_v4l2.h"
|
||||
|
||||
#include "SecBuffer.h"
|
||||
|
|
|
|||
Loading…
Reference in a new issue