USB BAM driver to support BAM-to-BAM
USB<->Peripheral transactions.
Change-Id: Ib49a41f5dcdccb6f6bff2492fa64ead40f18b870
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
The driver controls the SPS hardware DMA to move data in the following
modes:
1. Peripheral-to-Peripheral
2. Peripheral-to-Memory
3. Memory-to-Memory
This driver complies to BAM hardware version#2.
Change-Id: I1b2b503893cf6891b47201da0f44a47ce7511ece
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
SSBI is the Qualcomm single-wire serial bus interface used to connect
the MSM devices to the PMIC and other devices.
Since SSBI only supports a single slave, the driver gets the name of the
slave device passed in from the board file through the master device's
platform data.
SSBI registers pretty early (postcore), so that the PMIC can come up
before the board init. This is useful if the board init requires the
use of gpios that are connected through the PMIC.
Based on a patch by Dima Zavin <dima@android.com> that can be found at:
http://android.git.kernel.org/?p=kernel/msm.git;a=commitdiff;h=eb060bac4
This patch adds PMIC Arbiter support for the MSM8660. The PMIC Arbiter
is a hardware wrapper around the SSBI 2.0 controller that is designed to
overcome concurrency issues and security limitations. A controller_type
field is added to the platform data to specify the type of the SSBI
controller (1.0, 2.0, or PMIC Arbiter).
Change-Id: Ic37e1505f0ed7cfb8c5926a4c8d1770aa43e67cc
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
This is the initial version of the Wireless ConNectivity SubSystem (WCNSS)
WLAN driver. The WCNSS is a new Hardware integrating WLAN, BT and FM
technologies that is built into new MSM chip. This version of the driver
does basic WLAN device detection, WLAN SMD channel allocation probing and
trigger the PIL to download the WCNSS SW image.
Change-Id: I054566453152e8d8d02f79693e6a51f26d047835
Acked-by: Jeff Johnson <jjohnson@qualcomm.com>
Signed-off-by: Yunsen Wang <yunsenw@codeaurora.org>
CONFIG_ATH6K_LEGACY is added to support QCA AR6003 (Non cfg80211).
AR6003 driver needs WIRELESS_EXT support. WIRELESS_EXT is going to
be deprecated so adding it to defconfig will not work. Driver needs
to mark it as dependency.
Change-Id: I09c1f07ea15b8de75c1ed35d4fec6c82265018a9
Acked-by: Prasanth Bhatta <c_bhatta@qca.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Libra SDIO Interface driver module. Adds interface functions
to interact with the SD/MMC bus driver.
Acked-by: Anuradha Chandramouli <chandram@qualcomm.com>
Signed-off-by: Yunsen Wang <yunsenw@quicinc.com>
usbnet driver does not prevent auto suspend while submitting
the URB on rx data path. This causes the usb device to go to low power
mode in the middle of the downlink data transfer as the auto suspend
timer does not get reset by the driver while submitting the URB and
it expires.
Change-Id: Ibd3ac709e7103eb3df91ce3318dba6da4e551366
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Embedded rmnet usb host driver will be used to communicate with modem
devices having rmnet interface. This driver works as pass through layer
for control and data path communication. Driver currently supports device
with product id: 0x9034 and vendor id : 0x05c6.
Change-Id: Ie037af915f2650828420a351bd3fe503a505eaee
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Remove per-cpu structure and make it per-convert_context instead.
This allows moving requests between different cpus.
CRs-Fixed: 339113
Change-Id: Iadc618920c7bdec0b8bbe2accdce1b69dbce5582
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Cipher information is static, so it does not have to be in a per-cpu
structure.
This is a preparation for further patches that remove per-cpu structure
altogether.
Change-Id: If33109eb334549a3499b0a92d7e171a90622ad7a
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.
The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.
This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.
Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Change the request_irq call to request_any_context_irq, in order
to properly handle nested-interrupt setups.
Change-Id: If3e29836a7223244c5e18563e07c14570c865bf8
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Add hooks to control the relevant Gpio pin from
the Ethernet driver. This allows the driver to drive the
GPIO line low or high during suspend and resume for
power management.
Change-Id: Idfcf547501198d155d314a30923fd4de440840a9
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
RMNET over SMUX will support IP Traffic over HSUART. This is used in
Fusion 4 target between Application processor and QSC modem.
Change-Id: I50a8acf96dc85d10e574768dc21db672b6615924
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
The BAM Data Mux driver serves as a muxing interface layer to the SPS BAM
driver for RMNET.
Change-Id: Ia8aabb1874955342b4829ddb4e70a01a84c16d5f
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Module to allow RMNET over SDIO link. As multiple rmnet ports
need to use single SDIO line (function), muxing of the rmnet
packets is required.
Change-Id: I0b0cea7a2135ba4afdc00ce4faf6a28fda5dc929
Signed-off-by: Niranjana Vishwanathapura <nvishwan@codeaurora.org>
The MSM7X00A baseband makes up to 3 "virtual ethernet" channels available,
which allow ethernet packets to be exchanged with the cellular network, once
an appropriate data connection is established.
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: San Mehat <san@android.com>
[ARM] msm_rmnet: HACK: do not count ARP packets
The android network traffic watchdog is tricked into thinking that
data traffic is working at times when it isn't, due to ARP traffic
between the apps and modem processor. Don't count ARP packets in
link statistics to avoid this problem.
[ARM] msm: rmnet: Add stat tracking for number of radio wakeups occur.
There are two paramaters that appear for all rmnet devices.
rmnet0 for example:
/sys/devices/virtual/net/rmnet0/timeout (RW)
/sys/devices/virtual/net/rmnet0/wakeups (RO)
timeout is configured by userspace for the proper network timeout values
wakeups is the number of radio wakeups that occured.
By default timeout is zero which means the stats are disabled.
MSM_RMNET_DEBUG must be set.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Track wakeups due to xmit/rcv instead of globally.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Different stat timeouts when screen is on/off.
Timeout for modem powerdown can differ when the screen is on/off.
Allow timeout to change via early suspend/resume hooks.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Lock a wakelock for half a second when receiving data.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
[ARM] msm: rmnet: Tracks total awake time when the rmnet is active.
Exports data in /sys/devices/virtual/net/rmnet0/awake_time_ms
in time expressed as ms awake.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Fix compilation issue when MSM_RMNET_DEBUG is not set.
Signed-off-by: Dima Zavin <dima@android.com>
msm_rmnet: fix to build on 2.6.32
Change-Id: Ic6a4903dd12ea83723354d00f639ae2f9375167f
msm_rmnet: ensure packet writes are atomic
Use the smd_write_atomic() function to prevent concurrent
packet writes to the transport from stepping on each other.
Signed-off-by: Brian Swetland <swetland@google.com>
Normally bad block counts for ECC stats are collected during boot time.
This can be done lazily when the ECCGETSTATS ioctl is invoked on the
partition. This can significantly decrease boot time, depending on the
size of the partition. Also rescanning on every ioctl invocation helps
in having the latest bad block count rather than depending on the count
that is collected during boot.
Change-Id: I43d7a769a1d4ef769823d0b5bbe132adb474f892
Signed-off-by: Murali Palnati <palnatim@codeaurora.org>
The read ahead value was set to 4 KB in the .29/.32 kernel since it was
found to be the optimal value for boot time. This setting isn't present
in the .35 kernel hence setting the read ahead value to 4 KB in the .35
kernel
Change-Id: I1cc2fb5495c321869c10c9d4c030507b67711a3e
CRs-fixed: 256706
Signed-off-by: Jeegar Lakhani <jlakhani@codeaurora.org>
MTD tests run only on erased partitions. This module takes care of erasing
the partition before running any test. This test is especially helpful
when the MTD tests are to be run in automation one after the other.
Change-Id: I6a2566fce662bf132ff4a73ae2417807f1d17810
Signed-off-by: Murali Nalajala <mnalajal@qualcomm.com>
Add a new platform driver to receive updates on status
of Unstable Memory Region.
Change-Id: Idbe1c51e229a6494fc2881acdcff7a81111734e6
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>
Currently default configuration will be active
during SMSC hub enumeration. For changing the default
configuration, requires I2C support for configuring
the configurable parameters of SMSC hub like VID,PID.
Change-Id: Ie0449b166ddaae990b9a69c3a75f8059250faf0e
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
This driver is based of the TZCOM (planned to be deprecated soon).
It shares the same design as TZCOM with some re-organization and
new features added. QSEEcom (Qualcomm Secure Execution environment
Communicator) is named accordingly to be consistent with the
nomenclature used in the secure domain. The following additional
features (on top of current TZCOM) driver are implemented:
(1) Add support for multi-image loading.
The image that was loaded in TZCOM was hard-coded to "tzapps".
During a open() tzapps was loaded using pil driver call pil_get().
This severly limted the number of images that could be loaded to
one single application: named "tzapps". qseecom driver provides a
way to load any image on request. Client simply send the image
data in a specific format and this data is sent over to QSEE
(Qualcomm Secure Execution enviroment) to load accordingly.
(2) Add support for multi-client.
TZcom driver did not have provisions to support multiple clients
to interface with the single tzapp image loaded on the secure
domain. The changes added in qseecom driver allows for multiple
client to interface with a single image laoded and running in
secure domain.
(3) Add support for performance tweaking in QSEE
Added capability to send requests to QSEE to set specific clocks
for optimal crypto performance. This essentially will increase
the crypto performance on the secure domain. The crypto
functionality is used extensively by the current existing qseecom
client(s).
(4) Retain legacy support for QSEOS version 1.3.
In order for the existing applications to work with old QSEE image,
qseecom also supports the old mechanism (loading tzapp image via
pil). This was a requirement for existing products that are not
yet using the latest secure code.
Change-Id: I7cf2d62c612cb4d17b33579e66bee44c9844dfda
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
- The Trustzone Communicator driver provides interface for userspace
to communicate with TrustZone.
Change-Id: Id0dadacb9997d4a50e88f48ceb03540e1897df93
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
The XOADC resides on PMIC 8058 and
the ADC supports reading the AMUX, XO THERM
and MPP channels. The driver is accessed through
the common interface ADC driver. The XOADC driver
exports api's to the kernel to perform the adc
reads.
Change-Id: I2b1b95711521b95263de246eba88c735bad4d9e2
Signed-off-by: Phong Pham <phong@codeaurora.org>
Move the following subdevices to use the pm8xxx interface -
mpp, irq, gpio, keypad, power-key, leds, othc, vibrator,
rtc, batt-alarm, thermal, upl, nfc, pwm, xoadc, regulators,
xo-buffers, charger.
This allows usage of a common driver for modules which are same
across multiple PM8XXX PMICs. It also provides flexibility
to add/remove subdevices for multiple board configurations.
Change-Id: Id9795552fc9f4a2c920c070babfaef1f4cd6ca61
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
This driver uses the timed output framework to
support the vibrator functionality.
Change-Id: Ibd21dffb458e8eecd283e80f127ab44f84d1d6c8
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Qualcomm PM8058 chip has 8 channels of PWM, also called LPG (Light
Pulse Generator). All PWM channels can be used as simple PWM machine
or as a more advanced PWM pattern generator using programmed lookup
table. This patch supports simple PWM machine as a sub device of
pmic8058 core.
To use PWM:
1. #include <linux/pwm.h>
2. #include <linux/pmic8058-pwm.h> only when you want to do the
configuration by yourself.
3. First call
* pwm_request() -- to reserve a PWM chanel
4. Call these APIs to configure & start/stop a PWM waveform
* pwm_config(period, duty) -- to configure a PWM wave
* pwm_enable() -- to start and enable the PWM output
* pwm_disable() -- to stop and disable the PWM output
You can repeat above 3 calls for different PWM waveforms.
5. Last call
* pwm_free() -- to free the PWM channel
Signed-off-by: Willie Ruan <wruan@quicinc.com>
Low level TSIF (Transport Stream InterFace) driver
provides in-kernel API to be used by upper layer
drivers;
included also is example for upper layer driver
that uses TSIF API and implements character device.
Signed-off-by: Vladimir Kondratiev <vkondrat@qualcomm.com>
The current core assumes TABLA as the only codec driver registering.
To support single binary for multiple targets its essential that
we remove this restriction and move to a generic framework
to support multiple codec. This can be done by moving all codec
specific code to dedicated codec driver and use core driver to probe
the codec based on slimbus device id and do generic setup for the
codec. This also helps to have same boards with different flavours
of codec variants.
The WCD9XXX family of codecs share the initial codec register
mapping which holds the Slimbus device id to identify the
codec existing on the target.Core driver now registers the
codec device based on this check.
Change-Id: I4c43d5f04c20696f4f5138411460681ec7879d34
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add a driver to control the battery alarm module of PMIC PM8xxx
devices. This module uses a pair of comparators to determine
when battery under and over-voltage take place. A wakeup
interrupt is triggered in these cases which can then run any
notifiers which have been registered. Also add APIs to
configure the threshold voltages and the frequency at which the
hardware checks the state of the battery voltage.
Change-Id: Id0b82f9090b29ce743b5e0faac17853c94111771
Signed-off-by: David Collins <collinsd@codeaurora.org>
The driver adds support for configuring the following parameters for
external pmic speaker amp driver
1. Gain
2. Mute/Unmute
3. Speaker enable/Disable
The above operations are supported by driver by exported apis
from kernel space.The Machine driver from ALSA would use these
to configure speaker.
Change-Id: I9817f5d5c2952ca423b84f35162a842123e4d413
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add a PMIC 8XXX driver which will contain several miscellanous APIs.
The API that is needed is pm8xxx_reset_pwr_off.
Change-Id: I923d01cfd9dc3f8e760ae45d70799f80af65e88c
Signed-off-by: David Collins <collinsd@codeaurora.org>
Qualcomm PM8xxx chips, such as PM8058 and PM8921, have 8 channels of
PWM, also called LPG (Light Pulse Generator) in HW specs. All PWM
channels can be used as simple PWM machine or as a more advanced PWM
pattern generator using programmed lookup table.
This patch supports all APIs listed in <linux/pwm.h> with a small
difference. The two parameters (duty_ns and period_ns) in pwm_config()
are used as values in microseconds instead of nanoseconds. Otherwise a
32-bit integer can't fit for a range of 7 us to 300+ seconds.
Change-Id: Ic8f59e96360ea3dabef591e0b257a4ffe0796d9b
Signed-off-by: Willie Ruan <wruan@codeaurora.org>
Add support for the irq controller in Qualcomm PM8821 pmic. The
interrupt controller provides control for MPPs configured as
interrupts in addition to other subdevice interrupts.
The PM8821 IRQ controller is simpler than Secure IRQ controller
in other PMIC4 family of chips, i.e. PM8921. Also, it does not adhere
to SSBI register layout of Secure IRQ controller. This driver follows
the SSBI register layout of PM8821 IRQ controller and supports only
PM8821 IRQ controller.
The interrupt controller also provides a way to read the real time
status of an interrupt. This real time status is the only way one
can get the input values of gpio and mpp lines.
CRs-Fixed: 366276
Change-Id: Id4b9cbf42f296c26d4f8780590389bb2265e46c0
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add support for the Qualcomm PM8038 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, GPIO, MPP, RTC, Power Key,
Misc, and Debug.
Change-Id: I83f995cc238699100a05e82d04b45ea2a63eb667
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add support for the Qualcomm PM8018 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, GPIO, MPP, RTC, Power Key,
Misc, and Debug
Change-Id: I5787768603cb34bd3c9486d5c7d3fcf27a781ee9
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for the Qualcomm PM8821 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, MPP, and Debug
Change-Id: Ic072e634c55925292196a3e710d2dc628cbf2780
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add #define constants to describe the revision value of a given
PMIC (e.g. 8058, 8901, or 8921).
Change-Id: I45762c785622fa1259638d33c6529b210a2f143e
Signed-off-by: David Collins <collinsd@codeaurora.org>
Until now only the BMS system was using the ccadc so there was
no need to create a separate ccadc driver.
However we can run in a configuration with BMS disabled
and clients won't be able to read battery current via ccadc.
Separate the ccadc from the bms, this change in is preparation
to add a ccadc api to read the battery current.
Change-Id: Ib96b146d91d01d196df9291eb23432cd430db4d0
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
[sboyd: Take only 8921-core parts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
