usb_otg is able to know what kind of charger is connected like as
USB, TA and Slimport. And we can decide the max charging current
by cable type. pm8921-charger is able to use this information.
And unplug_check_worker has some problem. Wrong charging current
might set as 100mA even thought USB charger can be set by max 500mA.
It cause very slow charging.
msg_otg didn't use power supply api properly due to not supported
some POWER_SUPPLY_PROPs in pm8921-charger.c. It's also fixed.
Change-Id: I86661fbe38e3db5522caab6ff316c0100f87fe0d
Update platform driver open function call to access
audio_client pointer only after allocation to avoid crash.
Signed-off-by: SathishKumar Mani <smani@codeaurora.org>
A2DP audio skips out every 8-10 seconds in idle.
cpuidle is working and sometime A2DP audio skips in that time.
Use pm_qos to avoid this problem.
Change-Id: I00701c89cb9d5723e17928f452696db21e107ab0
Signed-off-by: Iliyan Malchev <malchev@google.com>
Powering down the MDM before disconnecting HSIC can cause PHY lock
due to bus-errors. Hence remove the hsic controller device before
resetting external modem.
CRs-Fixed: 388234
Change-Id: Ia22451cfcc4d9ef8a41348a8b0f02960c068c74b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
ulpi_read() relies on jiffies to calculate the timeout
for read operation on phy register. Calling ulpi_read()
with interrupts disabled, freezes jiffies on local processor.
In case of phy lockup this results in infinite loop leading
to watchdog reset. Use loop counter for timeout instead of
jiffies for read operation to avoid watchdog reset.
CRs-Fixed: 388234
Change-Id: I1d46052b087c42b9f422b6f7eb691498fa104718
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
An iommu page fault may heppen When a pipe_commit is executed
in between of frame dropped and pipe_queue during overlay play.
An mutex is necessary to mutual exclusive between pipe_commit
and overlay_play.
Change-Id: I736e821c6c648a6ebd435303a1906a40e9b75791
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
Dcs command mode BLT involves both overlay0 done interrupt
and dmap done interrupt. A transaction is start at kickoff and
end with done interrupt. At some cornor cases both overlay0 and
dmap transaction need to be completed before kickoff new transaction.
Change-Id: I5a3cc6e8255acf2c61fc627d35f990182d226f63
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
To avoid double freeing writeback at end of blt mode, let
both alloc and free writeback buffer done at do_blt().
Change-Id: Ida5d24589c19be8f6f655eca6add00badca356b2
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
There has VG1 pipe commit (pan display) happen after system
suspended. This left VG1 still staged up at mdp mixer. Once timing
generator is enabled at resume, VG1 pipe start fetching contents from
address 0 since VG1 has not yet be configured. This cause page fault.
This patch has sanity check at system suspend to make sure no any pipe
stage up at mixer after suspend.
Change-Id: Idcf974ceb4afe2a3ec55b9603b700fa497f84045
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
Since the smp call to stop the other cpus are handled in those
cpus in interrupt context, there's a potential for those smp
handlers to interrupt threads holding spin locks (such as the
one a mutex holds). This prevents those threads from ever
releasing their spin lock, so if the cpu doing the shutdown
is allowed to switch to another thread that tries to grab the
same lock/mutex, we could get into a deadlock (the spin lock
call is called with preemption disabled in the mutex lock code).
To avoid that possibility, disable preemption before doing the
smp_send_stop().
Change-Id: I7976c5382d7173fcb3cd14da8cc5083d442b2544
Signed-off-by: Mike J. Chen <mjchen@google.com>
PM8921 has issue about LPG driver lookup table index 0.
so, changing lookup table start index for leds. (no more do not use index 0)
Change-Id: Ie1ec2eb5727c84f0ba4fa37a61cf8fb5b66067f3
1. separate settings of brightness and max current
2. adjust leds brightness
LEDS on Rev.E or previous device are exposed directly.
So too much brilliant. Set lower brightness for Rev.E or
previous device
Change-Id: Iae3f6c61b310a7599f8e3c17258a7f17568c3260
When the touch driver detected an interrupt, it checks the interrupt
status register. If the value of the register is not normal,
such as zero, the touch driver considered it as a problem on the
device and reinitialized the touch device to recover.
This should not happen with normal touch firmware but, the touch
driver also need to ignore this kind of abnormal interrupt
rather than resetting the device, which causing unexpected freezing
during touch operation.
Change-Id: I989a9eab594f34ed9a32cea3e477faed38e32029
Signed-off-by: Iliyan Malchev <malchev@google.com>
Several changes are pending to be pulled in which are
not compatible with our changes. Specifically, a new
field to the allocation ioctl is added and the ioctl
numbers for cache flushing need to be changed.
Add these changes now until full changes can be pulled
in the future.
Change-Id: I9540495e25c7b6c414a6e3719f66f2cd9f78c585
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
The thermal mitigation and battery temp control can overwrite
the ibat max value each other. So this patch remove the possibility
of overwrite ibat max value by mitigation and battery temp control.
Change-Id: Ib0f7bf2b8bd2e474d1d9c76bd5100b05310cb048
There was a bug on setting the report mode, breaking other bit fields.
Due to this, the firmware jitter filter was disabled, causing
some noises. Expect more stable position report with this correction.
Change-Id: I14f48c39f654e5771eaf8b5a2e6a2fd0c713a3ee
Change the resolution to exact size, which is 2560-1 x 1536 -1 and
reduce the threshold for reduced report mode so that more accurate data
can be reported to framework to improve browser scroll effect.
This should work with firmware jitter filter enable.
Change-Id: I7a36c3dbdc38ec402749577dda515f81d27a6557
- Reddish component will be reduced by E4~E6 register.
- Strong edge will be smoothed by E2 register.
Change-Id: I17e9e53c5c0e8d82426922a6a6dc4fc7c26c1fd7
The genirq layer expects a 0 in case of failure. The current code is
returning -ENXIO for an error.
Fix it.
Change-Id: I0985f12477d472f4fbef525f7b04fed9bf593686
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
We need to monitor the battery status periodically.So change the message
level and simplify the information.
Change-Id: Ia010ad220875f6863b3cdf1835cf6a4afc555935
This patch solves the problem of recognize usb link when the TA is slow to
connect.
Change-Id: I9ebd118a53175a272117a75b5a5a1554da9c3d8b
Signed-off-by: Iliyan Malchev <malchev@google.com>
ASoc: msm: Add low latency playback and recording support.
commit 99bf09c1284610eaee3efda9d2cc694b6df313b9
- Add lowlatency pcm driver for Playback and Recording.
- Add support in target board files
- Add Recording Path to Multimedia5 FE DAI
- Add support in routing, platform, machine drivers
- Add low latency interfaces support in ASM and ADM drivers.
Change-Id: I40a09c472e7428f025e3244faa3a9ce65c146d15
It was observed that while charging the reported soc sometimes reaches
100% before end of charging happens. At other times it does not reach
100% at end of charge and a abrupt jump to 100% soc happens.
Fix this by linearly increasing soc based on battery charge current
after constant voltage phase is reached. Constant voltage phase is
reached when battery voltage reaches the max value.
Also once constant voltage phase is reached and the voltage or charge
current decreases keep reporting the earlier soc. This could be because
of a transient system load.
Change-Id: I7f04219f782d04cde95dd78c554ae5bbf1880f59
The "adjust_soc" algorithm where we change the open circuit voltage
(ocv) in steps so that the state of charge (soc) starts approaching
the estimated soc, causes nonlinearity in the soc curves if an incorrect
resistance value is fed to the algorithm.
As battery ages and temperature changes, it is hard to estimate the
exact battery resistance.
So to fix the nonlinearity, limit the amount by which the ocv is
changed. Make it proportional to the current, i.e. change ocv by
small amounts in light load and let it change by proportionally
large amounts in heavy load situations.
Also, make the point where the soc is adjusted configurable via platform
data instead of forcing it to 25%.
Change-Id: I8a09af51af4958e429ff275dbb48151c2948e04e
When a strong battery is removed, it was seen that the battery voltage
lines on the phone take about five to six seconds to go below 2.1volts
where the pmic resets all the battery backed registers.
If a new battery is plugged in within this time the driver will force
the shutdown soc on this battery which is incorrect.
Compare the shutdown soc with the calculated soc and if they are
different than a configurable limit, simply discard the shutdown soc
and use the calculated soc.
Change-Id: Ic1ce32c78346e7310b54087b03b2ee24ad6715b7
The dynamic UUC algorithm changes the UUC as load, state of charge and
temperature changes. This uncontrolled behaviour causes unacceptable
jumps in state of charge numbers.
Replace the dynamic UUC algorithm with a simple average current based
UUC. The average current is calculated by remembering the load for last
few (16) samples. Also to maintain a reasonable UUC while charging, a
load of 300mA is assumed.
Note that the first time UUC is calculated we don't have load samples
and in that case the instantaneous current is used.
Since we now don't change the UUC with respect to max possible load
(itest), the usage of this value is removed. Also instead of failure
voltage we introduce cutoff voltage which represents the loaded voltage
by which the battery should be reported 0%.
Change-Id: I831cea14c0670bbb61e6d7808ad336c5dbc33022
msm: board-8064: Enable NLDO TCXO workaround for APQ8064
commit bbc92bcf117385d1a69b872e1f412c7946246334
APQ8064 targets utilize a TCXO; therefore, enable the
rpm-regulator driver TCXO workaround so that they may be
properly enable and also not incur a power hit due to TCXO
being stuck on.
Change-Id: Iacba4de76590dcbcef46dc07b11c7e2fc0bb41fc
CRs-Fixed: 375809
msm_fb: display: change implementation of updating mdp_clk and blt mode
commit 496f928dd8cdd2b1b554c379d9336e2e902e0540
Currently mdp clk and bw requests are predefined in a 4-entry table
passed from the board file, and the logic to decide which level to use
is mainly based on source resolution. This patch is intended to
address several issues with this approach.
One major issue is clk and bandwidth depends on seperate things, and
need to be considered seperately. e.g. with mdp composition of
multiple pipes, bw request may be high but clk requirement may still
be low. The current approach that binds these two things together
causes inefficiency of power.
Another major issue is that there is no logic to calculate mdp clk
requirement of a single pipe based upon panel clk and downscale
parameters. Further the worst case of mdp clk should be determined by
all pipe usage. Without proper logic, many underrun have been
experienced, and blt mode may not be enalbed properly.
Also mdp_clk or blt mode update must be on right timing especially
between these two pathes: overlay play and pan display. In the
situations of performance from high to low or from low to high clk and
blt must be handled properly to avoid underruns.
In a summary, to support many different panels and targets and
complicated mdp pipe usage(mdp composition), mdp driver related to clk
and bw needs to be implemented differently. This patch is to seperate
clk and bw, and maily to deal with mdp clk and blt. Later increasing
granuity of bw will be added.
Change-Id: I0cda9597e130192cd224e2943711c8063bfc1a0a
