This patch allow satge commit without pipes queued to
allow a pipe to be un-staged from mixer immediately after
overlay_unset.
Change-Id: I03abb907c66cce3d0559743d3bb1eb26a88dc78a
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Sensor regulator could be still invalid at the time of a system
suspend, this change is to avoid freeing NULL regulators under such
occasion.
Change-Id: Ia520b2516b43feaa3fbbbe30628cc47ee7fad96a
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
This reverts commit 355c0ffe69b90b08ec4621bdb0964b42c6bb7eed.
Reverting it, as this is being handled in Display HAL now.
Change-Id: I2d807a17193c8d579bb23378e59817374d3f4ad7
Signed-off-by: Sushil Chauhan <sushilchauhan@codeaurora.org>
Add reference counting to all KGSL events since they are dependent
on the context. This avoids a race condition where the context
could be destroyed while the events are being processed during cleanup.
CRs-fixed: 438134
Change-Id: Ic2cd484d441e4c392ab63b0a0131accaceafc711
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Cpufreq suspend variable get's updated in kernel pm notifier
callback which gets called in process context. This will create
window where cpufreq governor may try to change the frequency
before suspend variable is updated while resume.
Define suspend/resume for cpufreq driver to update suspend variable
in atomic context.
Don't update the policy->cur upon cpufreq driver failure.
CRs-fixed: 423791
Change-Id: Id78705f5c3b8bf801c6253e9362299280903769f
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Add platform device for PC debug counters. These counter stores the
warmboot entry/exit counters for each core on a non-cacheable always
on IMEM memory. This is a useful feature during debug to understand if
the system has correctly warmbooted after a power collapse.
Usage for core0 debug counters:-
counters at address 0x2A03F664 represent no of times PC attempted.
counters at address 0x2A03F66C represent no of times PC failed.
counters at address 0x2A03F668 represent no of times warm boot happened.
no of PC attemps = PC failures + warm boot entries.
Change-Id: I3f78921f1ddd55967284fb7839a98bdb43efbeb9
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
The power collapse entry counters are incremented after the caches are
flushed during power collapse. In order for the counters to reflect the
current values, in the event of a crash, the counters have to be in a
non-cacheable memory.
Change-Id: If24a41cfa630fe0e843a4d41949ff38e1412889d
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Add warmboot entry/exit counters for each core on a non-cacheable always
on IMEM memory. This is a useful feature during debug to understand if
the system has correctly warmbooted after a power collapse. The debug
counters start at a memory offset of 0x664 on the IMEM. Each core
reserves 4 words for events, of which 3 are being used to monitor the
following events,
1) power collapse entry
2) warmboot exit
3) failed power collapse when wfi returns with a pending interrupt.
Change-Id: I45aac8e4a4d3421d586790b3b66fd71a8d88ea9d
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Add SPM sequences to do Krait retention for 8960,8930
and 8064. Also added a new rpmrs level containing the
latencies and power measurements for this new low power
state.
CRs-Fixed: 369864
Change-Id: I321fa22ab891b929366444f6187876c57f87c421
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
An incorrect ordering in the check of allowed modes, results in
standalone power collapse not getting selected when the secondary
cores are online.
Change-Id: Idc7177b78bd0ce7563cc27afbf6c12d3bc1f9f9a
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
To prevent the Krait core configuration from being indvertently changed
when doing L2 power collapse, save a few CP15 registers and restore them
back after coming out of power collapse. This needs to be done after
switching the Krait from active freq to QSB clock source.
Before doing power collapse, the core0 clock switches over to QSB. However,
QSB can run at any frequency and the voltage required for that
frequency, needs to be ensured when coming out power collapse. If the
QSB clock at resume, is a higher frequency at than the QSB clock was at
collapse, then we may run the risk of running at higher clock with a
lower voltage.
Hence, switch to 1.0 V (safe vdd) when going into PC (after switching to
QSB clock source) and the SPM would resume at 1.0V. After the core
starts running, restore the CP15 registers and switch to the previously
saved active voltage, before switching clocks to the active frequency.
This is applicable only for APQ8064.
Change-Id: I75a70f5e07bd581fc8028bed79de7ee796f4c411
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
Resetting SDCC-BAM after reset of SDCC-DML causes
interface disconnect between SDCC-BAM and SDCC-DML
and lead to hang when SDCC driver initiates data
transfer in BAM mode. Modify the SDCC reset sequence
to reset SDCC-DML after reset of SDCC-BAM.
CRs-Fixed: 423399
Change-Id: Ia31d40e30cbf95befba3b1133a525a81903789f2
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
(cherry picked from commit b745eeb229a476d81ee4177adfe168d3a35bda47)
Add virtual ANC widgets which are used to enable ANC
before PA is turned on, and to disable ANC before TX is
turned off.
CRs-fixed: 387904
Change-Id: I8c2fa670062f1486499c79653a2c223f7daba84f
Signed-off-by: Damir Didjusto <damird@codeaurora.org>
Moving RGB1 and RGB2 to AXI port 1. This fixes underrun issues seen
on External display while connecting and disconnecting HDMI. This patch
evenly balancing pipe loads on each port.
Change-Id: I2dc1166d04bb938f9e233a6de52f1a8a3fdd29e2
CRs-Fixed: 435458
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
During error cases, there might be situation, when slimbus channels
are being closed even when the number of active channels for
that DAI is 0. Avoid decrementing ch_act field if it is already 0.
Change-Id: Ie988eb049a20fc7cf5725ddc183ee1ae5fcb758d
Signed-off-by: Banajit Goswami <bgoswa@codeaurora.org>
If init call for LED flash is missed / failed, gpio_request() may not
be performed for gpio pins for LED flash. This causes stability issues
where gpio calls are performed without gpio_request. Check for valid
client before performing gpio configuration.
Change-Id: Ib232dd53b52af06981d53c799b000ac7f4917c9d
Signed-off-by: Sreesudhan Ramakrish Ramkumar <srramku@codeaurora.org>
(cherry picked from commit 952001729813a0184d95e20f30bee89d6a4cd9bc)
Characterization data shows that L2 runs up to 667MHz with vdd_cx at 1.05v.
Therefore, update the L2 voltage table to match the new data.
In addition, update acpuclock table to use the updated max L2 frequency
with vdd_cx at 1.05v.
Change-Id: I05ce13b9050a4b084d10a8f15dfa3bfe40d5fbe5
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
(cherry picked from commit 222732641a6b3a7eb81244c994c7d88435bedb45)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
To avoid a core vdd being set when the core could be executing the SPM
finite state machine, set the call to set vdd to execute on that
particular core using smp_call_function_single(). However, the call can
only be executed on a core thats online.
When a core is brought online, the acpuclk driver needs to ensure that
the core vdd is set correctly before the core can be brought online.
But, since smp_call_function_single() works on cores that are online,
the call to set vdd will fail and therefore the core will cannot be
onlined.
The error that would be seen when the kernel command line parameters has
maxcpus=2
[244.759529] saw_set_voltage: 8821_s0: msm_spm_set_vdd failed -6
[244.764687] acpuclk-8064 acpuclk-8064: regulator_set_voltage(krait2)(-6)
[244.771463] _cpu_up: attempt to bring up CPU 2 failed
It is safe to do a set the vdd of an offline core when called at cpu_up,
so bypass smp_call_function_single() and set the voltage of the core
directly from cpu0.
This chicken and egg problem will not be seen if the cores were
initialized by calling boot_secondary() at init.
CRs-fixed: 407553
Change-Id: Ifdc9a645b5a9715d0fda065b4b0c2bab056a3ade
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
(cherry picked from commit 8624ce7c52bba5acf7a2321690def8c732680199)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
Some CPU designs may be able to recover from certain types
of L1 instruction cache errors. Rather than panicing
whenever any kind of L1 error is encountered, add an option
to selectively panic on recoverable L1 errors.
Change-Id: Id8beb0e58d41fa5319f4ca76c5f35e2162f8b704
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit e1aba3d9b510d34e8309669d811a6f01568858dc)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
mdp_clk_ctrl on is not called when commit is from overlay commit path
which can cause mdp hang. mdp_clk_ctrl off should be after mdp
overlay2 is done, so schedule a work in overlay2 done isr.
Change-Id: I94fd08da27cfda114f5cc0056a5103f0a9b772f6
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Change the sleep-set force mode configuration for MSM8930 PM8038
SMPS 3 from LPM to AUTO. This modification ensures that the
modem processor does not crash in use cases where it is active
and heavily loaded while the Apps processor is asleep.
Change-Id: Id04feb4a0a07b4d27bcdc1f89dd9ffd24acb42d7
CRs-Fixed: 421559
Signed-off-by: David Collins <collinsd@codeaurora.org>
-While music playback is done and PCM close sequence
is in progress, if headset is inserted this will report
headset insert to snd_soc_jack_report. But it will get
stuck here waiting for lock that is already acquired by
DAPM at PCM stream close snd_soc_dapm_stream_event.
-Change the function call used to report insert/removal
from snd_soc_jack_report to snd_soc_jack_report_no_dapm
that fixes this deadlock.
CRs-Fixed: 429766
Change-Id: I167e45bdce9790ff7e878528629c4d652029bf26
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
FIR and M/N scalar when used for downscaling, drops
alpha channel of the given layer. To notify this, alpha_drop flag
is updated accordingly. This flag need not be checked for layers
with no alpha plane. In some scenarios alpha_drop may get enabled
for the layers with no alpha plane and cause issues realted to blend
composition of layers. Check for setting alpha_drop only if source
ayer has alpha plane.
Change-Id: Ie64b30c045a78d0d68eb9efacc76902afae7850d
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
This reverts commit 181fc587a179363624b9a3b47bcd0c04c05a8553
Reverting as Bluez stack need to be supported
Change-Id: Iea6169f19bc47786879845d1318ec47538ec1b1d
Signed-off-by: Bhasker Neti <bneti@codeaurora.org>
Reset SDCC controller if the check for TX/RX ACTIVE bit fails while
carrying out DPSM reset after the end of current transaction
instead of taking the entire system down by doing BUG().
CRs-Fixed: 423356
Change-Id: I9e2e945eb9a31d12e0a435df29a8215ae634724b
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
UDC and HCD call usb_phy_set_suspend() to enter/exit LPM during bus
suspend/resume. The current code simply return if the hardware is
already in the requested state. OTG driver resume the hardware upon
receiving remote wakeup from the attached peripheral. The OTG state
and state machine inputs are not updated later when HCD requests resume.
This OTG state is stuck in A_SUSPEND after bus resume and next suspend
requests are ignored.
CRs-fixed: 425108
Change-Id: Icc276337166a09c81188f71279a1276013bebc4f
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Retain RGB1 iommu information during base layer swap
so that iommu used by RGB1 can be freed back to pool later.
Change-Id: Ibed85179284743dc8a9d1434f0c81626b0567e16
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
(cherry picked from commit be46f9f596c5172438a74759d48ca7db600cd737)
Enable ip tables raw table for v4,v6.
This is used by BandwidthController in netd to collect
active network statistics.
CRs-Fixed: 426698
Change-Id: I9138771b6898a90bb8b069bf186cc036b24f4e70
Signed-off-by: Alex Yakavenka <ayakav@codeaurora.org>
When trying to add commands to the ringbuffer command stream, ensure
that the context point is not NULL before dereferencing it.
Change-Id: I6d8217ed4b180454eb43f2db161c10e86bc207da
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
As the ASM session is opened in hw_param the soft volume does
not take effect. Hence move it to hw_param so its applied after
asm open.
CRs-Fixed: 434323
Change-Id: I1ce24d74382bd2c1926df2d63ff2eb40b0652f95
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Rather than ignore some categories of idle events,
bin the events with small timelines and process all
events with the GPU DCVS algorithm.
CRs-Fixed: 427559
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Change-Id: I1a5e8d8af6020a08cf95a9daa934e825bc5f2854
Touch accuracy is offset on MTP devices. When the user
touches, the point is recorded as down and to the left
of where it should be. This can be corrected by
modifying boardfile offsets.
CRs-fixed: 423833
Change-Id: If722f8abe7f7cc67cd4370b47d5824386a688a9c
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Change the active and sleep set force mode configurations for
SMPS 3 and 4 on MSM8930+PM8917 targets to "none". This ensures
that crashes to not occur due to instability caused by using
"auto" mode.
Change-Id: I1522f334dbf3e6b7050beb943e8cbd4e661a18d0
CRs-Fixed: 432618
Signed-off-by: David Collins <collinsd@codeaurora.org>
(cherry picked from commit 1c9d4124676c5c9b5d68e83909bc0763e4880e81)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
(cherry picked from commit e4e7e37ebf7a8a27b0a243cda9c8008c20fd3a6f)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
To support the deep buffer output, the playback buffer size is
increased to 4k from 2k. Reverting the change as the support for
deep buffer output is no longer valid.
Change-Id: I5034245bde4b55a5816506fbdfeac970a8e7804b
CRs-Fixed: 438177
Signed-off-by: Subhash Chandra Bose Naripeddy <snariped@codeaurora.org>
Add data for seven PVS bins.
Support 25mV boost voltage.
Change-Id: I2d8560b92a40ece21b28f7276eb640dd0b4d7d80
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit 05f613c90ee45192148f39dd4726ce31237cf786)
Apply the 25mV boost on 8930ab, 8064v2, and 8960ab.
Change-Id: Ie3ad6b4043629ac13fb6dc2d77762cc3e9e15015
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit dec4587a32579056ac8ef385cee98da965bfe0b4)
On 8960ab we need to assert and deassert the resets to the gfx3d
axi clock in addition to the core and interface clocks. Add the
clock to the list so that we reset the gfx core appropriately.
We also need to halt both bus ports, therefore add the second bus
port id.
Change-Id: I05943906ed124658ab643d9bbce2bbca3f526a78
CRs-Fixed: 428846
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 9071e51f27a02139a7ea56d839a1d00ca22fa345)
HSIC HW can operate at SVS digital voltage when it is active.
Currently HSIC is voting for 120Mhz SFAB and 64Mhz DFAB clock
frequencies. Clock frequencies are directly proportional to SVS
voltage. If DFAB is running at 64Mhz or SFAB is running at 120Mhz
or higher SVS is not possible even though HSIC votes for it. Hence
do not vote for SFAB clock frequency and only vote for 32Mhz for
DFAB in order to allow SVS to happen. Voting for SVS voltage reduces
current consumption by 3mA in HSDPA network.
Change-Id: I8a6844efbbe90a8ea118be8450f8210717c2641b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
(cherry picked from commit cdf7fd212e2761525c07b842eb630677777cb3e5)
(cherry picked from commit f7f368826935049e7ffdb482865c47a3badcd147)
Remove unused fence input in mdp_display_commit
structure
Use different timeline name for different fb
Change-Id: I4edd335b36dce057ff3e54302af6088a9cc470ec
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
We should reset the data corrupt flag only for codecs
other than H264 and MPEG-2 in line with the video firmware
support. Hence, modify the conditional check.
Change-Id: I7c4d5557a3f9b1d1762fe7cfcd5693a6760188f0
Signed-off-by: Rajeshwar Kurapaty <rkurapat@codeaurora.org>
(cherry picked from commit c165675bf03feb182bfd46d2ac5ceebcf4987f74)
Signed-off-by: Manish Kumar <manishku@codeaurora.org>
ISDB-T client requires flags indicating the correctness
of output YUV data from MPEG-2 decoder. With this commit,
DATA_CORRUPT flag is sent from the driver if the output
YUV is either INCORRECT or APPROX_CORRECT.
Change-Id: I72e8ba81f45200715a195497d4eae140cbe86616
Signed-off-by: Rajeshwar Kurapaty <rkurapat@codeaurora.org>
(cherry picked from commit d68ca84da4a5c68eb2caf1f9e4dbb665bba5a05c)
Conflicts:
drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Signed-off-by: Manish Kumar <manishku@codeaurora.org>
MPEG-2 display aspect ratio calculation was done similar
to MPEG-4 standard. Correct it as per the MPEG-2 standard
and video core interface specification.
Change-Id: I1aa98ca238c7b38e35c78905b29457cfa59edd45
Signed-off-by: Shobhit Pandey <cshopan@codeaurora.org>
(cherry picked from commit ce5f973881c11491c3fa35ceb8c945a6c8ee2b8f)
Signed-off-by: Manish Kumar <manishku@codeaurora.org>
Add platform device for isa1200 to provide haptic
support
Change-Id: Ieb91a561f8b6ca6475332df461e0918d34e1d226
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
(cherry picked from commit ae54a6227f0e999fa93822c341d9605b2d007b9a)
The JB MR1 update was not recognizing the LVDS panel and hence
throwing an invalid panel error. Adding check for LVDS panel to
enable display on 8064 CDP.
Change-Id: Ib125cc797b288ca027f91778d9892acfa00a3214
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
There are two pathes (pan display and overlay commit) to commit
display buffer, so change the location of cpu timer wakup call to the
common pipe_commit function to make sure cpu get waked up around
vsync.
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Change-Id: Idbe6049d740a7e17a6a90e28566f7a9c74e348f2
