2017-04-18 09:52:17 +00:00
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/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
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2012-04-24 03:39:17 +00:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/of_device.h>
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2012-12-14 06:49:58 +00:00
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#include <linux/of_gpio.h>
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#include <linux/gpio.h>
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2012-08-14 05:57:11 +00:00
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#include <linux/err.h>
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#include <linux/regulator/consumer.h>
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2014-06-13 16:54:15 +00:00
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#include <linux/leds-qpnp-wled.h>
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2014-08-19 16:33:30 +00:00
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#include <linux/clk.h>
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2015-04-09 06:23:21 +00:00
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#include <linux/uaccess.h>
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2014-12-10 07:30:48 +00:00
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#include <linux/pm_qos.h>
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2012-04-24 03:39:17 +00:00
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#include "mdss.h"
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#include "mdss_panel.h"
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#include "mdss_dsi.h"
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2013-03-26 21:10:40 +00:00
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#include "mdss_debug.h"
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2015-05-28 21:31:48 +00:00
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#include "mdss_dba_utils.h"
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2015-08-24 15:43:21 +00:00
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#include "mdss_dsi_phy.h"
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2017-04-18 01:29:57 +00:00
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#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
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#include "samsung/ss_dsi_panel_common.h"
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#endif
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2012-04-24 03:39:17 +00:00
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2014-08-19 16:33:30 +00:00
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#define XO_CLK_RATE 19200000
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2015-04-23 03:14:49 +00:00
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/* Master structure to hold all the information about the DSI/panel */
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static struct mdss_dsi_data *mdss_dsi_res;
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2014-12-10 07:30:48 +00:00
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#define DSI_DISABLE_PC_LATENCY 100
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#define DSI_ENABLE_PC_LATENCY PM_QOS_DEFAULT_VALUE
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static struct pm_qos_request mdss_dsi_pm_qos_request;
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2015-10-09 07:02:08 +00:00
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static void mdss_dsi_pm_qos_add_request(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
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2014-12-10 07:30:48 +00:00
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{
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2015-10-09 07:02:08 +00:00
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struct irq_info *irq_info;
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if (!ctrl_pdata || !ctrl_pdata->shared_data)
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2015-07-17 17:51:06 +00:00
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return;
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2015-10-09 07:02:08 +00:00
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irq_info = ctrl_pdata->dsi_hw->irq_info;
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if (!irq_info)
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return;
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mutex_lock(&ctrl_pdata->shared_data->pm_qos_lock);
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if (!ctrl_pdata->shared_data->pm_qos_req_cnt) {
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pr_debug("%s: add request irq\n", __func__);
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mdss_dsi_pm_qos_request.type = PM_QOS_REQ_AFFINE_IRQ;
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mdss_dsi_pm_qos_request.irq = irq_info->irq;
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2015-07-17 17:51:06 +00:00
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pm_qos_add_request(&mdss_dsi_pm_qos_request,
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2015-10-09 07:02:08 +00:00
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PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
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2015-07-17 17:51:06 +00:00
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}
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2015-10-09 07:02:08 +00:00
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ctrl_pdata->shared_data->pm_qos_req_cnt++;
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mutex_unlock(&ctrl_pdata->shared_data->pm_qos_lock);
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2014-12-10 07:30:48 +00:00
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}
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2015-07-17 17:51:06 +00:00
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static void mdss_dsi_pm_qos_remove_request(struct dsi_shared_data *sdata)
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2014-12-10 07:30:48 +00:00
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{
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2015-07-17 17:51:06 +00:00
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if (!sdata)
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return;
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mutex_lock(&sdata->pm_qos_lock);
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if (sdata->pm_qos_req_cnt) {
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sdata->pm_qos_req_cnt--;
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if (!sdata->pm_qos_req_cnt) {
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pr_debug("%s: remove request", __func__);
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pm_qos_remove_request(&mdss_dsi_pm_qos_request);
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}
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} else {
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pr_warn("%s: unbalanced pm_qos ref count\n", __func__);
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}
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mutex_unlock(&sdata->pm_qos_lock);
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2014-12-10 07:30:48 +00:00
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}
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static void mdss_dsi_pm_qos_update_request(int val)
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{
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pr_debug("%s: update request %d", __func__, val);
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pm_qos_update_request(&mdss_dsi_pm_qos_request, val);
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}
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2014-04-08 10:21:49 +00:00
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static int mdss_dsi_pinctrl_set_state(struct mdss_dsi_ctrl_pdata *ctrl_pdata,
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bool active);
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2017-04-18 01:29:57 +00:00
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#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
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struct mdss_dsi_ctrl_pdata *mdss_dsi_get_ctrl(u32 ctrl_id)
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#else
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2015-04-23 03:14:49 +00:00
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static struct mdss_dsi_ctrl_pdata *mdss_dsi_get_ctrl(u32 ctrl_id)
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2017-04-18 01:29:57 +00:00
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#endif
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2015-04-23 03:14:49 +00:00
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{
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if (ctrl_id >= DSI_CTRL_MAX || !mdss_dsi_res)
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return NULL;
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return mdss_dsi_res->ctrl_pdata[ctrl_id];
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}
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2015-04-22 22:18:39 +00:00
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static void mdss_dsi_config_clk_src(struct platform_device *pdev)
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{
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struct mdss_dsi_data *dsi_res = platform_get_drvdata(pdev);
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struct dsi_shared_data *sdata = dsi_res->shared_data;
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if (!sdata->ext_byte0_clk || !sdata->ext_byte1_clk ||
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!sdata->ext_pixel0_clk || !sdata->ext_pixel1_clk) {
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pr_debug("%s: config_clk_src not needed\n", __func__);
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return;
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}
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2015-05-22 22:36:27 +00:00
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if (mdss_dsi_is_pll_src_default(sdata)) {
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/*
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* Default Mapping:
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* 1. dual-dsi/single-dsi:
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* DSI0 <--> PLL0
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* DSI1 <--> PLL1
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* 2. split-dsi:
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* DSI0 <--> PLL0
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* DSI1 <--> PLL0
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*/
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sdata->byte0_parent = sdata->ext_byte0_clk;
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sdata->pixel0_parent = sdata->ext_pixel0_clk;
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2015-09-09 11:50:18 +00:00
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if (mdss_dsi_is_hw_config_split(sdata) &&
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!sdata->split_config_independent_pll) {
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2015-05-22 22:36:27 +00:00
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sdata->byte1_parent = sdata->byte0_parent;
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sdata->pixel1_parent = sdata->pixel0_parent;
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} else {
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sdata->byte1_parent = sdata->ext_byte1_clk;
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sdata->pixel1_parent = sdata->ext_pixel1_clk;
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}
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pr_debug("%s: default: DSI0 <--> PLL0, DSI1 <--> %s", __func__,
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mdss_dsi_is_hw_config_split(sdata) ? "PLL0" : "PLL1");
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} else {
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2015-04-22 22:18:39 +00:00
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/*
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* For split-dsi and single-dsi use cases, map the PLL source
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* based on the pll source configuration. It is possible that
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* for split-dsi case, the only supported config is to source
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* the clocks from PLL0. This is not explictly checked here as
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* it should have been already enforced when validating the
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* board configuration.
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*/
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if (mdss_dsi_is_pll_src_pll0(sdata)) {
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pr_debug("%s: single source: PLL0", __func__);
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sdata->byte0_parent = sdata->ext_byte0_clk;
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sdata->pixel0_parent = sdata->ext_pixel0_clk;
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2015-05-22 22:36:27 +00:00
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} else if (mdss_dsi_is_pll_src_pll1(sdata)) {
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2015-04-22 22:18:39 +00:00
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pr_debug("%s: single source: PLL1", __func__);
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sdata->byte0_parent = sdata->ext_byte1_clk;
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sdata->pixel0_parent = sdata->ext_pixel1_clk;
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}
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sdata->byte1_parent = sdata->byte0_parent;
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sdata->pixel1_parent = sdata->pixel0_parent;
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}
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return;
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}
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static char const *mdss_dsi_get_clk_src(struct mdss_dsi_ctrl_pdata *ctrl)
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{
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struct dsi_shared_data *sdata;
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if (!ctrl) {
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pr_err("%s: Invalid input data\n", __func__);
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return "????";
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}
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sdata = ctrl->shared_data;
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if (mdss_dsi_is_left_ctrl(ctrl)) {
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if (sdata->byte0_parent == sdata->ext_byte0_clk)
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return "PLL0";
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else
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return "PLL1";
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} else {
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if (sdata->byte1_parent == sdata->ext_byte0_clk)
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return "PLL0";
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else
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return "PLL1";
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}
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}
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static int mdss_dsi_set_clk_src(struct mdss_dsi_ctrl_pdata *ctrl)
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{
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int rc;
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struct dsi_shared_data *sdata;
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struct clk *byte_parent, *pixel_parent;
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if (!ctrl) {
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pr_err("%s: Invalid input data\n", __func__);
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return -EINVAL;
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}
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sdata = ctrl->shared_data;
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if (!ctrl->byte_clk_rcg || !ctrl->pixel_clk_rcg) {
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pr_debug("%s: set_clk_src not needed\n", __func__);
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return 0;
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}
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if (mdss_dsi_is_left_ctrl(ctrl)) {
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byte_parent = sdata->byte0_parent;
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pixel_parent = sdata->pixel0_parent;
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} else {
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byte_parent = sdata->byte1_parent;
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pixel_parent = sdata->pixel1_parent;
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}
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rc = clk_set_parent(ctrl->byte_clk_rcg, byte_parent);
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if (rc) {
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pr_err("%s: failed to set parent for byte clk for ctrl%d. rc=%d\n",
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__func__, ctrl->ndx, rc);
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goto error;
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}
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rc = clk_set_parent(ctrl->pixel_clk_rcg, pixel_parent);
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if (rc) {
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pr_err("%s: failed to set parent for pixel clk for ctrl%d. rc=%d\n",
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__func__, ctrl->ndx, rc);
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goto error;
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}
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pr_debug("%s: ctrl%d clock source set to %s", __func__, ctrl->ndx,
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mdss_dsi_get_clk_src(ctrl));
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error:
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return rc;
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}
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2015-05-06 07:39:44 +00:00
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static int mdss_dsi_regulator_init(struct platform_device *pdev,
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struct dsi_shared_data *sdata)
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2012-08-14 05:57:11 +00:00
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{
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2015-05-06 07:39:44 +00:00
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int rc = 0, i = 0, j = 0;
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2012-12-14 06:49:58 +00:00
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2015-05-06 07:39:44 +00:00
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if (!pdev || !sdata) {
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2013-03-12 22:19:17 +00:00
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pr_err("%s: invalid input\n", __func__);
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return -EINVAL;
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2012-08-14 05:57:11 +00:00
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}
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2015-05-06 07:39:44 +00:00
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for (i = DSI_CORE_PM; !rc && (i < DSI_MAX_PM); i++) {
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2013-12-24 23:23:11 +00:00
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rc = msm_dss_config_vreg(&pdev->dev,
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2015-05-06 07:39:44 +00:00
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sdata->power_data[i].vreg_config,
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sdata->power_data[i].num_vreg, 1);
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2014-12-10 14:42:34 +00:00
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if (rc) {
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2013-12-24 23:23:11 +00:00
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pr_err("%s: failed to init vregs for %s\n",
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__func__, __mdss_dsi_pm_name(i));
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2015-05-06 07:39:44 +00:00
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for (j = i-1; j >= DSI_CORE_PM; j--) {
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2014-12-10 14:42:34 +00:00
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msm_dss_config_vreg(&pdev->dev,
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2015-05-06 07:39:44 +00:00
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sdata->power_data[j].vreg_config,
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sdata->power_data[j].num_vreg, 0);
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2014-12-10 14:42:34 +00:00
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}
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}
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2013-12-24 23:23:11 +00:00
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}
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return rc;
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2012-08-14 05:57:11 +00:00
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}
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2014-07-29 06:24:46 +00:00
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static int mdss_dsi_panel_power_off(struct mdss_panel_data *pdata)
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2012-08-14 05:57:11 +00:00
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{
|
2013-12-24 23:23:11 +00:00
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int ret = 0;
|
2012-12-14 06:49:58 +00:00
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struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2017-04-18 01:29:57 +00:00
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#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
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struct samsung_display_driver_data *vdd = samsung_get_vdd();
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struct dsi_shared_data *sdata = NULL;
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struct mdss_dsi_ctrl_pdata *other_ctrl = NULL;
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#endif
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2012-12-14 06:49:58 +00:00
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if (pdata == NULL) {
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pr_err("%s: Invalid input data\n", __func__);
|
2013-06-29 01:35:23 +00:00
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ret = -EINVAL;
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2014-07-29 06:24:46 +00:00
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goto end;
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2012-12-14 06:49:58 +00:00
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}
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ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
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panel_data);
|
2012-08-14 05:57:11 +00:00
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2014-07-29 06:24:46 +00:00
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ret = mdss_dsi_panel_reset(pdata, 0);
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if (ret) {
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pr_warn("%s: Panel reset failed. rc=%d\n", __func__, ret);
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ret = 0;
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}
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2014-04-09 11:45:37 +00:00
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2014-07-29 06:24:46 +00:00
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if (mdss_dsi_pinctrl_set_state(ctrl_pdata, false))
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pr_debug("reset disable: pinctrl not enabled\n");
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2012-08-14 05:57:11 +00:00
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2015-04-25 04:33:16 +00:00
|
|
|
ret = msm_dss_enable_vreg(
|
2015-05-06 07:39:44 +00:00
|
|
|
ctrl_pdata->panel_power_data.vreg_config,
|
|
|
|
ctrl_pdata->panel_power_data.num_vreg, 0);
|
2015-04-25 04:33:16 +00:00
|
|
|
if (ret)
|
|
|
|
pr_err("%s: failed to disable vregs for %s\n",
|
|
|
|
__func__, __mdss_dsi_pm_name(DSI_PANEL_PM));
|
2014-04-08 10:21:49 +00:00
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
|
|
|
|
sdata = ctrl_pdata->shared_data;
|
|
|
|
other_ctrl = mdss_dsi_get_other_ctrl(ctrl_pdata);
|
|
|
|
|
|
|
|
if(mdss_dsi_is_hw_config_split(sdata) && mdss_dsi_is_right_ctrl(ctrl_pdata)) {
|
|
|
|
if (!IS_ERR_OR_NULL(other_ctrl))
|
|
|
|
pdata = &(other_ctrl->panel_data);
|
|
|
|
|
|
|
|
if(mdss_samsung_panel_extra_power(pdata, 0))
|
|
|
|
pr_err("%s : failed to enable extra power\n", __func__);
|
|
|
|
} else if (!mdss_dsi_is_hw_config_split(sdata) && mdss_samsung_panel_extra_power(pdata, 0))
|
|
|
|
pr_err("%s : failed to enable extra power\n", __func__);
|
|
|
|
|
|
|
|
if(vdd->dtsi_data[ctrl_pdata->ndx].samsung_power_off_delay)
|
|
|
|
usleep(vdd->dtsi_data[ctrl_pdata->ndx].samsung_power_off_delay);
|
|
|
|
|
|
|
|
#endif
|
2014-07-29 06:24:46 +00:00
|
|
|
end:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
struct samsung_display_driver_data *vdd = samsung_get_vdd();
|
|
|
|
#endif
|
2014-07-29 06:24:46 +00:00
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
2015-04-25 04:33:16 +00:00
|
|
|
ret = msm_dss_enable_vreg(
|
2015-05-06 07:39:44 +00:00
|
|
|
ctrl_pdata->panel_power_data.vreg_config,
|
|
|
|
ctrl_pdata->panel_power_data.num_vreg, 1);
|
2015-04-25 04:33:16 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("%s: failed to enable vregs for %s\n",
|
|
|
|
__func__, __mdss_dsi_pm_name(DSI_PANEL_PM));
|
|
|
|
return ret;
|
2012-08-14 05:57:11 +00:00
|
|
|
}
|
2015-04-25 04:33:16 +00:00
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if (mdss_samsung_panel_extra_power(pdata, 1))
|
|
|
|
pr_err("%s : failed to enable extra power\n", __func__);
|
|
|
|
|
|
|
|
if(vdd->dtsi_data[ctrl_pdata->ndx].samsung_power_on_delay)
|
|
|
|
usleep(vdd->dtsi_data[ctrl_pdata->ndx].samsung_power_on_delay);
|
|
|
|
#endif
|
2014-07-29 06:24:46 +00:00
|
|
|
/*
|
|
|
|
* If continuous splash screen feature is enabled, then we need to
|
|
|
|
* request all the GPIOs that have already been configured in the
|
|
|
|
* bootloader. This needs to be done irresepective of whether
|
|
|
|
* the lp11_init flag is set or not.
|
|
|
|
*/
|
|
|
|
if (pdata->panel_info.cont_splash_enabled ||
|
|
|
|
!pdata->panel_info.mipi.lp11_init) {
|
|
|
|
if (mdss_dsi_pinctrl_set_state(ctrl_pdata, true))
|
|
|
|
pr_debug("reset enable: pinctrl not enabled\n");
|
2013-12-24 23:23:11 +00:00
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
ret = mdss_dsi_panel_reset(pdata, 1);
|
|
|
|
if (ret)
|
|
|
|
pr_err("%s: Panel reset failed. rc=%d\n",
|
|
|
|
__func__, ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-10-30 22:03:45 +00:00
|
|
|
static int mdss_dsi_panel_power_lp(struct mdss_panel_data *pdata, int enable)
|
2014-07-29 07:11:45 +00:00
|
|
|
{
|
2014-10-30 22:03:45 +00:00
|
|
|
/* Panel power control when entering/exiting lp mode */
|
2014-07-29 07:11:45 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
static int mdss_dsi_panel_power_ctrl(struct mdss_panel_data *pdata,
|
|
|
|
int power_state)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct mdss_panel_info *pinfo;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pinfo = &pdata->panel_info;
|
2017-04-18 01:29:57 +00:00
|
|
|
pr_info("%s: cur_power_state=%d req_power_state=%d\n", __func__,
|
2014-07-29 06:24:46 +00:00
|
|
|
pinfo->panel_power_state, power_state);
|
|
|
|
|
|
|
|
if (pinfo->panel_power_state == power_state) {
|
|
|
|
pr_debug("%s: no change needed\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If a dynamic mode switch is pending, the regulators should not
|
|
|
|
* be turned off or on.
|
|
|
|
*/
|
|
|
|
if (pdata->panel_info.dynamic_switch_pending)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
switch (power_state) {
|
|
|
|
case MDSS_PANEL_POWER_OFF:
|
|
|
|
ret = mdss_dsi_panel_power_off(pdata);
|
|
|
|
break;
|
|
|
|
case MDSS_PANEL_POWER_ON:
|
2014-08-02 00:20:51 +00:00
|
|
|
if (mdss_dsi_is_panel_on_lp(pdata))
|
2014-10-30 22:03:45 +00:00
|
|
|
ret = mdss_dsi_panel_power_lp(pdata, false);
|
2014-07-29 07:11:45 +00:00
|
|
|
else
|
|
|
|
ret = mdss_dsi_panel_power_on(pdata);
|
|
|
|
break;
|
2014-10-30 22:03:45 +00:00
|
|
|
case MDSS_PANEL_POWER_LP1:
|
|
|
|
case MDSS_PANEL_POWER_LP2:
|
|
|
|
ret = mdss_dsi_panel_power_lp(pdata, true);
|
2014-07-29 06:24:46 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
pr_err("%s: unknown panel power state requested (%d)\n",
|
|
|
|
__func__, power_state);
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!ret)
|
|
|
|
pinfo->panel_power_state = power_state;
|
2013-12-24 23:23:11 +00:00
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
return ret;
|
2012-08-14 05:57:11 +00:00
|
|
|
}
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2013-03-12 22:19:17 +00:00
|
|
|
static void mdss_dsi_put_dt_vreg_data(struct device *dev,
|
|
|
|
struct dss_module_power *module_power)
|
|
|
|
{
|
|
|
|
if (!module_power) {
|
|
|
|
pr_err("%s: invalid input\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (module_power->vreg_config) {
|
|
|
|
devm_kfree(dev, module_power->vreg_config);
|
|
|
|
module_power->vreg_config = NULL;
|
|
|
|
}
|
|
|
|
module_power->num_vreg = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_get_dt_vreg_data(struct device *dev,
|
2015-04-27 18:09:59 +00:00
|
|
|
struct device_node *of_node, struct dss_module_power *mp,
|
|
|
|
enum dsi_pm_type module)
|
2013-03-12 22:19:17 +00:00
|
|
|
{
|
2013-06-29 01:35:23 +00:00
|
|
|
int i = 0, rc = 0;
|
|
|
|
u32 tmp = 0;
|
2015-04-27 18:09:59 +00:00
|
|
|
struct device_node *supply_node = NULL;
|
2013-12-24 23:23:11 +00:00
|
|
|
const char *pm_supply_name = NULL;
|
|
|
|
struct device_node *supply_root_node = NULL;
|
2013-03-12 22:19:17 +00:00
|
|
|
|
|
|
|
if (!dev || !mp) {
|
|
|
|
pr_err("%s: invalid input\n", __func__);
|
|
|
|
rc = -EINVAL;
|
2013-11-15 04:19:37 +00:00
|
|
|
return rc;
|
2013-03-12 22:19:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
mp->num_vreg = 0;
|
2013-12-24 23:23:11 +00:00
|
|
|
pm_supply_name = __mdss_dsi_pm_supply_node_name(module);
|
|
|
|
supply_root_node = of_get_child_by_name(of_node, pm_supply_name);
|
|
|
|
if (!supply_root_node) {
|
2015-04-27 18:09:59 +00:00
|
|
|
/*
|
|
|
|
* Try to get the root node for panel power supply using
|
|
|
|
* of_parse_phandle() API if of_get_child_by_name() API fails.
|
|
|
|
*/
|
|
|
|
supply_root_node = of_parse_phandle(of_node, pm_supply_name, 0);
|
|
|
|
if (!supply_root_node) {
|
2015-04-23 03:14:49 +00:00
|
|
|
pr_err("no supply entry present: %s\n", pm_supply_name);
|
2015-04-27 18:09:59 +00:00
|
|
|
goto novreg;
|
|
|
|
}
|
2013-03-12 22:19:17 +00:00
|
|
|
}
|
2013-12-24 23:23:11 +00:00
|
|
|
|
2015-04-27 18:09:59 +00:00
|
|
|
|
2013-12-24 23:23:11 +00:00
|
|
|
for_each_child_of_node(supply_root_node, supply_node) {
|
|
|
|
mp->num_vreg++;
|
|
|
|
}
|
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
if (mp->num_vreg == 0) {
|
2013-03-12 22:19:17 +00:00
|
|
|
pr_debug("%s: no vreg\n", __func__);
|
2013-06-29 01:35:23 +00:00
|
|
|
goto novreg;
|
|
|
|
} else {
|
|
|
|
pr_debug("%s: vreg found. count=%d\n", __func__, mp->num_vreg);
|
2013-03-12 22:19:17 +00:00
|
|
|
}
|
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
mp->vreg_config = devm_kzalloc(dev, sizeof(struct dss_vreg) *
|
|
|
|
mp->num_vreg, GFP_KERNEL);
|
|
|
|
if (!mp->vreg_config) {
|
|
|
|
pr_err("%s: can't alloc vreg mem\n", __func__);
|
2013-03-12 22:19:17 +00:00
|
|
|
rc = -ENOMEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2013-12-24 23:23:11 +00:00
|
|
|
for_each_child_of_node(supply_root_node, supply_node) {
|
|
|
|
const char *st = NULL;
|
|
|
|
/* vreg-name */
|
|
|
|
rc = of_property_read_string(supply_node,
|
|
|
|
"qcom,supply-name", &st);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: error reading name. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
snprintf(mp->vreg_config[i].vreg_name,
|
|
|
|
ARRAY_SIZE((mp->vreg_config[i].vreg_name)), "%s", st);
|
|
|
|
/* vreg-min-voltage */
|
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-min-voltage", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: error reading min volt. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
mp->vreg_config[i].min_voltage = tmp;
|
|
|
|
|
|
|
|
/* vreg-max-voltage */
|
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-max-voltage", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: error reading max volt. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
mp->vreg_config[i].max_voltage = tmp;
|
|
|
|
|
|
|
|
/* enable-load */
|
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-enable-load", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: error reading enable load. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
mp->vreg_config[i].enable_load = tmp;
|
|
|
|
|
|
|
|
/* disable-load */
|
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-disable-load", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: error reading disable load. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
mp->vreg_config[i].disable_load = tmp;
|
|
|
|
|
|
|
|
/* pre-sleep */
|
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-pre-on-sleep", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_debug("%s: error reading supply pre sleep value. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
rc = 0;
|
|
|
|
} else {
|
|
|
|
mp->vreg_config[i].pre_on_sleep = tmp;
|
|
|
|
}
|
2013-03-12 22:19:17 +00:00
|
|
|
|
2013-12-24 23:23:11 +00:00
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-pre-off-sleep", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_debug("%s: error reading supply pre sleep value. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
rc = 0;
|
|
|
|
} else {
|
|
|
|
mp->vreg_config[i].pre_off_sleep = tmp;
|
|
|
|
}
|
2013-06-29 01:35:23 +00:00
|
|
|
|
2013-12-24 23:23:11 +00:00
|
|
|
/* post-sleep */
|
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-post-on-sleep", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_debug("%s: error reading supply post sleep value. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
rc = 0;
|
|
|
|
} else {
|
|
|
|
mp->vreg_config[i].post_on_sleep = tmp;
|
|
|
|
}
|
2013-03-12 22:19:17 +00:00
|
|
|
|
2013-12-24 23:23:11 +00:00
|
|
|
rc = of_property_read_u32(supply_node,
|
|
|
|
"qcom,supply-post-off-sleep", &tmp);
|
|
|
|
if (rc) {
|
|
|
|
pr_debug("%s: error reading supply post sleep value. rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
rc = 0;
|
|
|
|
} else {
|
|
|
|
mp->vreg_config[i].post_off_sleep = tmp;
|
2013-03-12 22:19:17 +00:00
|
|
|
}
|
2013-12-24 23:23:11 +00:00
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
pr_err("%s: %s min=%d, max=%d, enable=%d, disable=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n",
|
2013-12-24 23:23:11 +00:00
|
|
|
__func__,
|
|
|
|
mp->vreg_config[i].vreg_name,
|
|
|
|
mp->vreg_config[i].min_voltage,
|
|
|
|
mp->vreg_config[i].max_voltage,
|
|
|
|
mp->vreg_config[i].enable_load,
|
|
|
|
mp->vreg_config[i].disable_load,
|
|
|
|
mp->vreg_config[i].pre_on_sleep,
|
|
|
|
mp->vreg_config[i].post_on_sleep,
|
|
|
|
mp->vreg_config[i].pre_off_sleep,
|
|
|
|
mp->vreg_config[i].post_off_sleep
|
|
|
|
);
|
|
|
|
++i;
|
2013-03-12 22:19:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
error:
|
|
|
|
if (mp->vreg_config) {
|
|
|
|
devm_kfree(dev, mp->vreg_config);
|
|
|
|
mp->vreg_config = NULL;
|
|
|
|
}
|
2013-06-29 01:35:23 +00:00
|
|
|
novreg:
|
2013-03-12 22:19:17 +00:00
|
|
|
mp->num_vreg = 0;
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2014-09-24 17:21:55 +00:00
|
|
|
static int mdss_dsi_get_panel_cfg(char *panel_cfg,
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl)
|
2013-06-20 00:37:50 +00:00
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
struct mdss_panel_cfg *pan_cfg = NULL;
|
|
|
|
|
|
|
|
if (!panel_cfg)
|
|
|
|
return MDSS_PANEL_INTF_INVALID;
|
|
|
|
|
2014-09-24 17:21:55 +00:00
|
|
|
pan_cfg = ctrl->mdss_util->panel_intf_type(MDSS_PANEL_INTF_DSI);
|
2013-06-20 00:37:50 +00:00
|
|
|
if (IS_ERR(pan_cfg)) {
|
|
|
|
return PTR_ERR(pan_cfg);
|
|
|
|
} else if (!pan_cfg) {
|
|
|
|
panel_cfg[0] = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("%s:%d: cfg:[%s]\n", __func__, __LINE__,
|
|
|
|
pan_cfg->arg_cfg);
|
|
|
|
rc = strlcpy(panel_cfg, pan_cfg->arg_cfg,
|
|
|
|
sizeof(pan_cfg->arg_cfg));
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-04-09 06:23:21 +00:00
|
|
|
struct buf_data {
|
2015-05-05 11:11:20 +00:00
|
|
|
char *buf; /* cmd buf */
|
|
|
|
int blen; /* cmd buf length */
|
|
|
|
char *string_buf; /* cmd buf as string, 3 bytes per number */
|
|
|
|
int sblen; /* string buffer length */
|
2015-04-09 06:23:21 +00:00
|
|
|
int sync_flag;
|
2017-04-18 09:52:17 +00:00
|
|
|
struct mutex dbg_mutex; /* mutex to synchronize read/write/flush */
|
2015-04-09 06:23:21 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
struct mdss_dsi_debugfs_info {
|
|
|
|
struct dentry *root;
|
|
|
|
struct mdss_dsi_ctrl_pdata ctrl_pdata;
|
|
|
|
struct buf_data on_cmd;
|
|
|
|
struct buf_data off_cmd;
|
|
|
|
u32 override_flag;
|
|
|
|
};
|
|
|
|
|
|
|
|
static int mdss_dsi_cmd_state_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
/* non-seekable */
|
|
|
|
file->private_data = inode->i_private;
|
|
|
|
return nonseekable_open(inode, file);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t mdss_dsi_cmd_state_read(struct file *file, char __user *buf,
|
|
|
|
size_t count, loff_t *ppos)
|
|
|
|
{
|
|
|
|
int *link_state = file->private_data;
|
|
|
|
char buffer[32];
|
|
|
|
int blen = 0;
|
|
|
|
|
|
|
|
if (*ppos)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if ((*link_state) == DSI_HS_MODE)
|
|
|
|
blen = snprintf(buffer, sizeof(buffer), "dsi_hs_mode\n");
|
|
|
|
else
|
|
|
|
blen = snprintf(buffer, sizeof(buffer), "dsi_lp_mode\n");
|
|
|
|
|
|
|
|
if (blen < 0)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (copy_to_user(buf, buffer, blen))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
*ppos += blen;
|
|
|
|
return blen;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t mdss_dsi_cmd_state_write(struct file *file,
|
|
|
|
const char __user *p, size_t count, loff_t *ppos)
|
|
|
|
{
|
|
|
|
int *link_state = file->private_data;
|
|
|
|
char *input;
|
|
|
|
|
|
|
|
input = kmalloc(count, GFP_KERNEL);
|
|
|
|
if (!input) {
|
|
|
|
pr_err("%s: Failed to allocate memory\n", __func__);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2016-04-21 00:09:36 +00:00
|
|
|
if (copy_from_user(input, p, count)) {
|
|
|
|
kfree(input);
|
2015-04-09 06:23:21 +00:00
|
|
|
return -EFAULT;
|
2016-04-21 00:09:36 +00:00
|
|
|
}
|
2015-04-09 06:23:21 +00:00
|
|
|
input[count-1] = '\0';
|
|
|
|
|
|
|
|
if (strnstr(input, "dsi_hs_mode", strlen("dsi_hs_mode")))
|
|
|
|
*link_state = DSI_HS_MODE;
|
|
|
|
else
|
|
|
|
*link_state = DSI_LP_MODE;
|
|
|
|
|
|
|
|
kfree(input);
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct file_operations mdss_dsi_cmd_state_fop = {
|
|
|
|
.open = mdss_dsi_cmd_state_open,
|
|
|
|
.read = mdss_dsi_cmd_state_read,
|
|
|
|
.write = mdss_dsi_cmd_state_write,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int mdss_dsi_cmd_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
/* non-seekable */
|
|
|
|
file->private_data = inode->i_private;
|
|
|
|
return nonseekable_open(inode, file);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t mdss_dsi_cmd_read(struct file *file, char __user *buf,
|
2015-05-05 11:11:20 +00:00
|
|
|
size_t count, loff_t *ppos)
|
2015-04-09 06:23:21 +00:00
|
|
|
{
|
|
|
|
struct buf_data *pcmds = file->private_data;
|
2015-05-05 11:11:20 +00:00
|
|
|
char *bp;
|
2015-04-09 06:23:21 +00:00
|
|
|
ssize_t ret = 0;
|
|
|
|
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_lock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
if (*ppos == 0) {
|
|
|
|
kfree(pcmds->string_buf);
|
|
|
|
pcmds->string_buf = NULL;
|
|
|
|
pcmds->sblen = 0;
|
2015-04-09 06:23:21 +00:00
|
|
|
}
|
|
|
|
|
2015-05-05 11:11:20 +00:00
|
|
|
if (!pcmds->string_buf) {
|
|
|
|
/*
|
|
|
|
* Buffer size is the sum of cmd length (3 bytes per number)
|
|
|
|
* with NULL terminater
|
|
|
|
*/
|
|
|
|
int bsize = ((pcmds->blen)*3 + 1);
|
|
|
|
int blen = 0;
|
|
|
|
char *buffer;
|
|
|
|
|
|
|
|
buffer = kmalloc(bsize, GFP_KERNEL);
|
|
|
|
if (!buffer) {
|
|
|
|
pr_err("%s: Failed to allocate memory\n", __func__);
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2015-04-09 06:23:21 +00:00
|
|
|
|
2015-05-05 11:11:20 +00:00
|
|
|
bp = pcmds->buf;
|
|
|
|
while ((blen < (bsize-1)) &&
|
|
|
|
(bp < ((pcmds->buf) + (pcmds->blen)))) {
|
|
|
|
struct dsi_ctrl_hdr dchdr =
|
|
|
|
*((struct dsi_ctrl_hdr *)bp);
|
|
|
|
int dhrlen = sizeof(dchdr), dlen;
|
|
|
|
char *tmp = (char *)(&dchdr);
|
|
|
|
dlen = dchdr.dlen;
|
|
|
|
dchdr.dlen = htons(dchdr.dlen);
|
|
|
|
while (dhrlen--)
|
|
|
|
blen += snprintf(buffer+blen, bsize-blen,
|
|
|
|
"%02x ", (*tmp++));
|
|
|
|
|
|
|
|
bp += sizeof(dchdr);
|
|
|
|
while (dlen--)
|
|
|
|
blen += snprintf(buffer+blen, bsize-blen,
|
|
|
|
"%02x ", (*bp++));
|
|
|
|
buffer[blen-1] = '\n';
|
|
|
|
}
|
|
|
|
buffer[blen] = '\0';
|
|
|
|
pcmds->string_buf = buffer;
|
|
|
|
pcmds->sblen = blen;
|
2015-04-09 06:23:21 +00:00
|
|
|
}
|
|
|
|
|
2015-05-05 11:11:20 +00:00
|
|
|
/*
|
|
|
|
* The max value of count is PAGE_SIZE(4096).
|
|
|
|
* It may need multiple times of reading if string buf is too large
|
|
|
|
*/
|
|
|
|
if (*ppos >= (pcmds->sblen)) {
|
|
|
|
kfree(pcmds->string_buf);
|
|
|
|
pcmds->string_buf = NULL;
|
|
|
|
pcmds->sblen = 0;
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
return 0; /* the end */
|
|
|
|
}
|
|
|
|
ret = simple_read_from_buffer(buf, count, ppos, pcmds->string_buf,
|
|
|
|
pcmds->sblen);
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-04-09 06:23:21 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t mdss_dsi_cmd_write(struct file *file, const char __user *p,
|
2015-05-05 11:11:20 +00:00
|
|
|
size_t count, loff_t *ppos)
|
2015-04-09 06:23:21 +00:00
|
|
|
{
|
|
|
|
struct buf_data *pcmds = file->private_data;
|
2015-05-05 11:11:20 +00:00
|
|
|
ssize_t ret = 0;
|
|
|
|
int blen = 0;
|
|
|
|
char *string_buf;
|
2015-04-09 06:23:21 +00:00
|
|
|
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_lock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
if (*ppos == 0) {
|
|
|
|
kfree(pcmds->string_buf);
|
|
|
|
pcmds->string_buf = NULL;
|
|
|
|
pcmds->sblen = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Allocate memory for the received string */
|
|
|
|
blen = count + (pcmds->sblen);
|
|
|
|
string_buf = krealloc(pcmds->string_buf, blen + 1, GFP_KERNEL);
|
|
|
|
if (!string_buf) {
|
2015-04-09 06:23:21 +00:00
|
|
|
pr_err("%s: Failed to allocate memory\n", __func__);
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-04-09 06:23:21 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2015-05-05 11:11:20 +00:00
|
|
|
/* Writing in batches is possible */
|
|
|
|
ret = simple_write_to_buffer(string_buf, blen, ppos, p, count);
|
|
|
|
|
|
|
|
string_buf[blen] = '\0';
|
|
|
|
pcmds->string_buf = string_buf;
|
|
|
|
pcmds->sblen = blen;
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_cmd_flush(struct file *file, fl_owner_t id)
|
|
|
|
{
|
|
|
|
struct buf_data *pcmds = file->private_data;
|
|
|
|
int blen, len, i;
|
|
|
|
char *buf, *bufp, *bp;
|
|
|
|
struct dsi_ctrl_hdr *dchdr;
|
|
|
|
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_lock(&pcmds->dbg_mutex);
|
|
|
|
|
|
|
|
if (!pcmds->string_buf) {
|
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
return 0;
|
2017-04-18 09:52:17 +00:00
|
|
|
}
|
2015-04-09 06:23:21 +00:00
|
|
|
|
|
|
|
/*
|
2015-05-05 11:11:20 +00:00
|
|
|
* Allocate memory for command buffer
|
|
|
|
* 3 bytes per number, and 2 bytes for the last one
|
2015-04-09 06:23:21 +00:00
|
|
|
*/
|
2015-05-05 11:11:20 +00:00
|
|
|
blen = ((pcmds->sblen) + 2) / 3;
|
|
|
|
buf = kzalloc(blen, GFP_KERNEL);
|
2015-04-09 06:23:21 +00:00
|
|
|
if (!buf) {
|
|
|
|
pr_err("%s: Failed to allocate memory\n", __func__);
|
2015-05-05 11:11:20 +00:00
|
|
|
kfree(pcmds->string_buf);
|
|
|
|
pcmds->string_buf = NULL;
|
|
|
|
pcmds->sblen = 0;
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-04-09 06:23:21 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2015-05-05 11:11:20 +00:00
|
|
|
/* Translate the input string to command array */
|
|
|
|
bufp = pcmds->string_buf;
|
2015-04-09 06:23:21 +00:00
|
|
|
for (i = 0; i < blen; i++) {
|
|
|
|
uint32_t value = 0;
|
|
|
|
int step = 0;
|
|
|
|
if (sscanf(bufp, "%02x%n", &value, &step) > 0) {
|
|
|
|
*(buf+i) = (char)value;
|
|
|
|
bufp += step;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-05-05 11:11:20 +00:00
|
|
|
/* Scan dcs commands */
|
2015-04-09 06:23:21 +00:00
|
|
|
bp = buf;
|
|
|
|
len = blen;
|
|
|
|
while (len >= sizeof(*dchdr)) {
|
|
|
|
dchdr = (struct dsi_ctrl_hdr *)bp;
|
|
|
|
dchdr->dlen = ntohs(dchdr->dlen);
|
|
|
|
if (dchdr->dlen > len) {
|
|
|
|
pr_err("%s: dtsi cmd=%x error, len=%d\n",
|
|
|
|
__func__, dchdr->dtype, dchdr->dlen);
|
|
|
|
kfree(buf);
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-04-09 06:23:21 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
bp += sizeof(*dchdr);
|
|
|
|
len -= sizeof(*dchdr);
|
|
|
|
bp += dchdr->dlen;
|
|
|
|
len -= dchdr->dlen;
|
|
|
|
}
|
|
|
|
if (len != 0) {
|
|
|
|
pr_err("%s: dcs_cmd=%x len=%d error!\n", __func__,
|
|
|
|
bp[0], len);
|
|
|
|
kfree(buf);
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-04-09 06:23:21 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pcmds->sync_flag) {
|
|
|
|
pcmds->buf = buf;
|
|
|
|
pcmds->blen = blen;
|
|
|
|
pcmds->sync_flag = 0;
|
|
|
|
} else {
|
|
|
|
kfree(pcmds->buf);
|
|
|
|
pcmds->buf = buf;
|
|
|
|
pcmds->blen = blen;
|
|
|
|
}
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_unlock(&pcmds->dbg_mutex);
|
2015-05-05 11:11:20 +00:00
|
|
|
return 0;
|
2015-04-09 06:23:21 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct file_operations mdss_dsi_cmd_fop = {
|
|
|
|
.open = mdss_dsi_cmd_open,
|
|
|
|
.read = mdss_dsi_cmd_read,
|
|
|
|
.write = mdss_dsi_cmd_write,
|
2015-05-05 11:11:20 +00:00
|
|
|
.flush = mdss_dsi_cmd_flush,
|
2015-04-09 06:23:21 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
struct dentry *dsi_debugfs_create_dcs_cmd(const char *name, umode_t mode,
|
|
|
|
struct dentry *parent, struct buf_data *cmd,
|
|
|
|
struct dsi_panel_cmds ctrl_cmds)
|
|
|
|
{
|
2017-04-18 09:52:17 +00:00
|
|
|
mutex_init(&cmd->dbg_mutex);
|
2015-04-09 06:23:21 +00:00
|
|
|
cmd->buf = ctrl_cmds.buf;
|
|
|
|
cmd->blen = ctrl_cmds.blen;
|
2015-05-05 11:11:20 +00:00
|
|
|
cmd->string_buf = NULL;
|
|
|
|
cmd->sblen = 0;
|
2015-04-09 06:23:21 +00:00
|
|
|
cmd->sync_flag = 1;
|
|
|
|
|
|
|
|
return debugfs_create_file(name, mode, parent,
|
|
|
|
cmd, &mdss_dsi_cmd_fop);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define DEBUGFS_CREATE_DCS_CMD(name, node, cmd, ctrl_cmd) \
|
|
|
|
dsi_debugfs_create_dcs_cmd(name, 0644, node, cmd, ctrl_cmd)
|
|
|
|
|
|
|
|
static int mdss_dsi_debugfs_setup(struct mdss_panel_data *pdata,
|
|
|
|
struct dentry *parent)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata, *dfs_ctrl;
|
|
|
|
struct mdss_dsi_debugfs_info *dfs;
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
|
|
|
dfs = kzalloc(sizeof(*dfs), GFP_KERNEL);
|
|
|
|
if (!dfs) {
|
|
|
|
pr_err("%s: No memory to create dsi ctrl debugfs info",
|
|
|
|
__func__);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
dfs->root = debugfs_create_dir("dsi_ctrl_pdata", parent);
|
|
|
|
if (IS_ERR_OR_NULL(dfs->root)) {
|
|
|
|
pr_err("%s: debugfs_create_dir dsi fail, error %ld\n",
|
|
|
|
__func__, PTR_ERR(dfs->root));
|
|
|
|
kfree(dfs);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
dfs_ctrl = &dfs->ctrl_pdata;
|
|
|
|
debugfs_create_u32("override_flag", 0644, dfs->root,
|
|
|
|
&dfs->override_flag);
|
|
|
|
|
|
|
|
debugfs_create_bool("cmd_sync_wait_broadcast", 0644, dfs->root,
|
|
|
|
(u32 *)&dfs_ctrl->cmd_sync_wait_broadcast);
|
|
|
|
debugfs_create_bool("cmd_sync_wait_trigger", 0644, dfs->root,
|
|
|
|
(u32 *)&dfs_ctrl->cmd_sync_wait_trigger);
|
|
|
|
|
|
|
|
debugfs_create_file("dsi_on_cmd_state", 0644, dfs->root,
|
|
|
|
&dfs_ctrl->on_cmds.link_state, &mdss_dsi_cmd_state_fop);
|
|
|
|
debugfs_create_file("dsi_off_cmd_state", 0644, dfs->root,
|
|
|
|
&dfs_ctrl->off_cmds.link_state, &mdss_dsi_cmd_state_fop);
|
|
|
|
|
|
|
|
DEBUGFS_CREATE_DCS_CMD("dsi_on_cmd", dfs->root, &dfs->on_cmd,
|
|
|
|
ctrl_pdata->on_cmds);
|
|
|
|
DEBUGFS_CREATE_DCS_CMD("dsi_off_cmd", dfs->root, &dfs->off_cmd,
|
|
|
|
ctrl_pdata->off_cmds);
|
|
|
|
|
|
|
|
dfs->override_flag = 0;
|
|
|
|
dfs->ctrl_pdata = *ctrl_pdata;
|
|
|
|
ctrl_pdata->debugfs_info = dfs;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_debugfs_init(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
|
|
|
struct mdss_panel_data *pdata = &ctrl_pdata->panel_data;
|
|
|
|
int rc;
|
|
|
|
|
2016-03-14 10:51:26 +00:00
|
|
|
if (!pdata)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2015-04-09 06:23:21 +00:00
|
|
|
do {
|
|
|
|
struct mdss_panel_info panel_info = pdata->panel_info;
|
2015-07-02 01:05:22 +00:00
|
|
|
if (panel_info.debugfs_info) {
|
|
|
|
rc = mdss_dsi_debugfs_setup(pdata,
|
2015-04-09 06:23:21 +00:00
|
|
|
panel_info.debugfs_info->root);
|
2015-07-02 01:05:22 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: Error in initilizing dsi ctrl debugfs\n",
|
|
|
|
__func__);
|
|
|
|
return rc;
|
|
|
|
}
|
2015-04-09 06:23:21 +00:00
|
|
|
}
|
|
|
|
pdata = pdata->next;
|
|
|
|
} while (pdata);
|
|
|
|
|
|
|
|
pr_debug("%s: Initialized mdss_dsi_debugfs_init\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mdss_dsi_debugfs_cleanup(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
|
|
|
struct mdss_panel_data *pdata = &ctrl_pdata->panel_data;
|
|
|
|
|
|
|
|
do {
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl = container_of(pdata,
|
|
|
|
struct mdss_dsi_ctrl_pdata, panel_data);
|
|
|
|
struct mdss_dsi_debugfs_info *dfs = ctrl->debugfs_info;
|
|
|
|
if (dfs && dfs->root)
|
|
|
|
debugfs_remove_recursive(dfs->root);
|
2016-06-17 17:33:45 +00:00
|
|
|
kfree(dfs);
|
2015-04-09 06:23:21 +00:00
|
|
|
pdata = pdata->next;
|
|
|
|
} while (pdata);
|
|
|
|
pr_debug("%s: Cleaned up mdss_dsi_debugfs_info\n", __func__);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _mdss_dsi_refresh_cmd(struct buf_data *new_cmds,
|
|
|
|
struct dsi_panel_cmds *original_pcmds)
|
|
|
|
{
|
|
|
|
char *bp;
|
|
|
|
int len, cnt, i;
|
|
|
|
struct dsi_ctrl_hdr *dchdr;
|
|
|
|
struct dsi_cmd_desc *cmds;
|
|
|
|
|
|
|
|
if (new_cmds->sync_flag)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
bp = new_cmds->buf;
|
|
|
|
len = new_cmds->blen;
|
|
|
|
cnt = 0;
|
|
|
|
/* Scan dcs commands and get dcs command count */
|
|
|
|
while (len >= sizeof(*dchdr)) {
|
|
|
|
dchdr = (struct dsi_ctrl_hdr *)bp;
|
|
|
|
if (dchdr->dlen > len) {
|
|
|
|
pr_err("%s: dtsi cmd=%x error, len=%d\n",
|
|
|
|
__func__, dchdr->dtype, dchdr->dlen);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
bp += sizeof(*dchdr) + dchdr->dlen;
|
|
|
|
len -= sizeof(*dchdr) + dchdr->dlen;
|
|
|
|
cnt++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len != 0) {
|
|
|
|
pr_err("%s: dcs_cmd=%x len=%d error!\n", __func__,
|
|
|
|
bp[0], len);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Reallocate space for dcs commands */
|
|
|
|
cmds = kzalloc(cnt * sizeof(struct dsi_cmd_desc), GFP_KERNEL);
|
|
|
|
if (!cmds) {
|
|
|
|
pr_err("%s: Failed to allocate memory\n", __func__);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
kfree(original_pcmds->buf);
|
|
|
|
kfree(original_pcmds->cmds);
|
|
|
|
original_pcmds->cmd_cnt = cnt;
|
|
|
|
original_pcmds->cmds = cmds;
|
|
|
|
original_pcmds->buf = new_cmds->buf;
|
|
|
|
original_pcmds->blen = new_cmds->blen;
|
|
|
|
|
|
|
|
bp = original_pcmds->buf;
|
|
|
|
len = original_pcmds->blen;
|
|
|
|
for (i = 0; i < cnt; i++) {
|
|
|
|
dchdr = (struct dsi_ctrl_hdr *)bp;
|
|
|
|
len -= sizeof(*dchdr);
|
|
|
|
bp += sizeof(*dchdr);
|
|
|
|
original_pcmds->cmds[i].dchdr = *dchdr;
|
|
|
|
original_pcmds->cmds[i].payload = bp;
|
|
|
|
bp += dchdr->dlen;
|
|
|
|
len -= dchdr->dlen;
|
|
|
|
}
|
|
|
|
|
|
|
|
new_cmds->sync_flag = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mdss_dsi_debugfsinfo_to_dsictrl_info(
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_debugfs_info *dfs = ctrl_pdata->debugfs_info;
|
|
|
|
|
|
|
|
ctrl_pdata->cmd_sync_wait_broadcast =
|
|
|
|
dfs->ctrl_pdata.cmd_sync_wait_broadcast;
|
|
|
|
ctrl_pdata->cmd_sync_wait_trigger =
|
|
|
|
dfs->ctrl_pdata.cmd_sync_wait_trigger;
|
|
|
|
|
|
|
|
_mdss_dsi_refresh_cmd(&dfs->on_cmd, &ctrl_pdata->on_cmds);
|
|
|
|
_mdss_dsi_refresh_cmd(&dfs->off_cmd, &ctrl_pdata->off_cmds);
|
|
|
|
|
|
|
|
ctrl_pdata->on_cmds.link_state =
|
|
|
|
dfs->ctrl_pdata.on_cmds.link_state;
|
|
|
|
ctrl_pdata->off_cmds.link_state =
|
|
|
|
dfs->ctrl_pdata.off_cmds.link_state;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mdss_dsi_validate_debugfs_info(
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_debugfs_info *dfs = ctrl_pdata->debugfs_info;
|
|
|
|
|
|
|
|
if (dfs->override_flag) {
|
|
|
|
pr_debug("%s: Overriding dsi ctrl_pdata with debugfs data\n",
|
|
|
|
__func__);
|
|
|
|
dfs->override_flag = 0;
|
|
|
|
mdss_dsi_debugfsinfo_to_dsictrl_info(ctrl_pdata);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
static int mdss_dsi_off(struct mdss_panel_data *pdata, int power_state)
|
2012-08-25 04:38:36 +00:00
|
|
|
{
|
|
|
|
int ret = 0;
|
2012-12-14 06:49:58 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2013-08-27 20:18:08 +00:00
|
|
|
struct mdss_panel_info *panel_info = NULL;
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
struct samsung_display_driver_data *vdd = NULL;
|
|
|
|
#endif
|
2012-08-25 04:38:36 +00:00
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
2013-03-26 21:10:40 +00:00
|
|
|
|
2013-08-27 20:18:08 +00:00
|
|
|
panel_info = &ctrl_pdata->panel_data.panel_info;
|
2014-07-29 06:24:46 +00:00
|
|
|
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s+: ctrl=%pK ndx=%d power_state=%d\n",
|
2014-07-29 06:24:46 +00:00
|
|
|
__func__, ctrl_pdata, ctrl_pdata->ndx, power_state);
|
|
|
|
|
|
|
|
if (power_state == panel_info->panel_power_state) {
|
|
|
|
pr_debug("%s: No change in power state %d -> %d\n", __func__,
|
|
|
|
panel_info->panel_power_state, power_state);
|
|
|
|
goto end;
|
|
|
|
}
|
2013-03-26 21:10:40 +00:00
|
|
|
|
2014-10-30 22:03:45 +00:00
|
|
|
if (mdss_panel_is_power_on(power_state)) {
|
2014-07-29 07:11:45 +00:00
|
|
|
pr_debug("%s: dsi_off with panel always on\n", __func__);
|
|
|
|
goto panel_power_ctrl;
|
|
|
|
}
|
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
vdd = check_valid_ctrl(ctrl_pdata);
|
|
|
|
if (pdata->panel_info.type == MIPI_CMD_PANEL &&
|
|
|
|
!vdd->dtsi_data[ctrl_pdata->ndx].samsung_tcon_clk_on_support)
|
|
|
|
#else
|
2013-05-01 16:51:46 +00:00
|
|
|
if (pdata->panel_info.type == MIPI_CMD_PANEL)
|
2017-04-18 01:29:57 +00:00
|
|
|
#endif
|
2014-03-12 20:34:50 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2014-09-18 10:43:58 +00:00
|
|
|
if (!pdata->panel_info.ulps_suspend_enabled) {
|
|
|
|
/* disable DSI controller */
|
|
|
|
mdss_dsi_controller_cfg(0, pdata);
|
2012-08-25 04:38:36 +00:00
|
|
|
|
2014-09-18 10:43:58 +00:00
|
|
|
/* disable DSI phy */
|
|
|
|
mdss_dsi_phy_disable(ctrl_pdata);
|
|
|
|
}
|
2015-10-20 11:09:28 +00:00
|
|
|
ctrl_pdata->ctrl_state &= ~CTRL_STATE_DSI_ACTIVE;
|
2014-03-12 20:34:50 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
2013-05-06 23:10:03 +00:00
|
|
|
|
2014-07-29 07:11:45 +00:00
|
|
|
panel_power_ctrl:
|
2014-07-29 06:24:46 +00:00
|
|
|
ret = mdss_dsi_panel_power_ctrl(pdata, power_state);
|
2012-08-14 05:57:11 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("%s: Panel power off failed\n", __func__);
|
2014-07-29 06:24:46 +00:00
|
|
|
goto end;
|
2012-08-14 05:57:11 +00:00
|
|
|
}
|
|
|
|
|
2013-08-27 20:18:08 +00:00
|
|
|
if (panel_info->dynamic_fps
|
|
|
|
&& (panel_info->dfps_update == DFPS_SUSPEND_RESUME_MODE)
|
|
|
|
&& (panel_info->new_fps != panel_info->mipi.frame_rate))
|
|
|
|
panel_info->mipi.frame_rate = panel_info->new_fps;
|
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
end:
|
2012-04-24 03:39:17 +00:00
|
|
|
pr_debug("%s-:\n", __func__);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-01-21 18:36:24 +00:00
|
|
|
int mdss_dsi_switch_mode(struct mdss_panel_data *pdata, int mode)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
struct mipi_panel_info *pinfo;
|
|
|
|
|
|
|
|
if (!pdata) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
pr_debug("%s, start\n", __func__);
|
|
|
|
|
|
|
|
pinfo = &pdata->panel_info.mipi;
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
|
|
|
if (pinfo->dms_mode != DYNAMIC_MODE_SWITCH_IMMEDIATE) {
|
|
|
|
pr_debug("%s: Dynamic mode switch not enabled.\n", __func__);
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mode == MIPI_VIDEO_PANEL) {
|
|
|
|
mode = DSI_VIDEO_MODE;
|
|
|
|
} else if (mode == MIPI_CMD_PANEL) {
|
|
|
|
mode = DSI_CMD_MODE;
|
|
|
|
} else {
|
|
|
|
pr_err("Invalid mode selected, mode=%d\n", mode);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
|
|
|
ctrl_pdata->switch_mode(pdata, mode);
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
|
|
|
|
|
|
|
pr_debug("%s, end\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_reconfig(struct mdss_panel_data *pdata, int mode)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
struct mipi_panel_info *pinfo;
|
|
|
|
|
|
|
|
if (!pdata) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
pr_debug("%s, start\n", __func__);
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
pinfo = &pdata->panel_info.mipi;
|
|
|
|
|
|
|
|
if (pinfo->dms_mode == DYNAMIC_MODE_SWITCH_IMMEDIATE) {
|
|
|
|
/* reset DSI */
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
|
|
|
mdss_dsi_sw_reset(ctrl_pdata, true);
|
|
|
|
mdss_dsi_ctrl_setup(ctrl_pdata);
|
|
|
|
mdss_dsi_controller_cfg(true, pdata);
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("%s, end\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
2014-04-09 11:45:37 +00:00
|
|
|
static int mdss_dsi_update_panel_config(struct mdss_dsi_ctrl_pdata *ctrl_pdata,
|
|
|
|
int mode)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
|
|
|
|
|
|
|
|
if (mode == DSI_CMD_MODE) {
|
|
|
|
pinfo->mipi.mode = DSI_CMD_MODE;
|
|
|
|
pinfo->type = MIPI_CMD_PANEL;
|
|
|
|
pinfo->mipi.vsync_enable = 1;
|
|
|
|
pinfo->mipi.hw_vsync_mode = 1;
|
2015-02-10 21:51:54 +00:00
|
|
|
pinfo->partial_update_enabled = pinfo->partial_update_supported;
|
2014-04-09 11:45:37 +00:00
|
|
|
} else { /*video mode*/
|
|
|
|
pinfo->mipi.mode = DSI_VIDEO_MODE;
|
|
|
|
pinfo->type = MIPI_VIDEO_PANEL;
|
|
|
|
pinfo->mipi.vsync_enable = 0;
|
|
|
|
pinfo->mipi.hw_vsync_mode = 0;
|
2015-02-10 21:51:54 +00:00
|
|
|
pinfo->partial_update_enabled = 0;
|
2014-04-09 11:45:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata->panel_mode = pinfo->mipi.mode;
|
|
|
|
mdss_panel_get_dst_fmt(pinfo->bpp, pinfo->mipi.mode,
|
|
|
|
pinfo->mipi.pixel_packing, &(pinfo->mipi.dst_format));
|
|
|
|
pinfo->cont_splash_enabled = 0;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2013-12-25 08:36:16 +00:00
|
|
|
|
|
|
|
int mdss_dsi_on(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct mdss_panel_info *pinfo;
|
|
|
|
struct mipi_panel_info *mipi;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2014-07-29 06:24:46 +00:00
|
|
|
int cur_power_state;
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
struct samsung_display_driver_data *vdd = NULL;
|
|
|
|
struct dsi_shared_data *sdata = NULL;
|
|
|
|
struct mdss_dsi_ctrl_pdata *other_ctrl = NULL;
|
|
|
|
#endif
|
2013-12-25 08:36:16 +00:00
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
2015-04-09 06:23:21 +00:00
|
|
|
if (ctrl_pdata->debugfs_info)
|
|
|
|
mdss_dsi_validate_debugfs_info(ctrl_pdata);
|
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
cur_power_state = pdata->panel_info.panel_power_state;
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s+: ctrl=%pK ndx=%d cur_power_state=%d\n", __func__,
|
2014-07-29 06:24:46 +00:00
|
|
|
ctrl_pdata, ctrl_pdata->ndx, cur_power_state);
|
2013-12-25 08:36:16 +00:00
|
|
|
|
|
|
|
pinfo = &pdata->panel_info;
|
|
|
|
mipi = &pdata->panel_info.mipi;
|
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
vdd = check_valid_ctrl(ctrl_pdata);
|
|
|
|
if (IS_ERR_OR_NULL(vdd)) {
|
|
|
|
pr_err("%s: Invalid data ctrl : 0x%zx\n", __func__, (size_t)vdd);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
sdata = ctrl_pdata->shared_data;
|
|
|
|
other_ctrl = mdss_dsi_get_other_ctrl(ctrl_pdata);
|
|
|
|
|
|
|
|
if (vdd->esd_recovery.esd_irq_enable)
|
|
|
|
vdd->esd_recovery.esd_irq_enable(true, false, (void *)vdd);
|
|
|
|
#endif
|
|
|
|
|
2014-08-02 00:20:51 +00:00
|
|
|
if (mdss_dsi_is_panel_on_interactive(pdata)) {
|
2014-10-31 18:09:28 +00:00
|
|
|
/*
|
|
|
|
* all interrupts are disabled at LK
|
|
|
|
* for cont_splash case, intr mask bits need
|
|
|
|
* to be restored to allow dcs command be
|
|
|
|
* sent to panel
|
|
|
|
*/
|
|
|
|
mdss_dsi_restore_intr_mask(ctrl_pdata);
|
2014-07-29 06:24:46 +00:00
|
|
|
pr_debug("%s: panel already on\n", __func__);
|
|
|
|
goto end;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = mdss_dsi_panel_power_ctrl(pdata, MDSS_PANEL_POWER_ON);
|
2013-12-25 08:36:16 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret);
|
2015-04-22 22:18:39 +00:00
|
|
|
goto end;
|
|
|
|
}
|
|
|
|
|
2016-02-19 20:30:45 +00:00
|
|
|
if (mdss_panel_is_power_on(cur_power_state)) {
|
|
|
|
pr_debug("%s: dsi_on from panel low power state\n", __func__);
|
2015-04-22 22:18:39 +00:00
|
|
|
goto end;
|
2013-12-25 08:36:16 +00:00
|
|
|
}
|
|
|
|
|
2016-02-19 20:30:45 +00:00
|
|
|
ret = mdss_dsi_set_clk_src(ctrl_pdata);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("%s: failed to set clk src. rc=%d\n", __func__, ret);
|
2014-07-29 07:11:45 +00:00
|
|
|
goto end;
|
|
|
|
}
|
|
|
|
|
2014-04-25 19:29:50 +00:00
|
|
|
/*
|
2015-04-22 22:18:39 +00:00
|
|
|
* Enable DSI core clocks prior to resetting and initializing DSI
|
2014-12-16 00:59:12 +00:00
|
|
|
* Phy. Phy and ctrl setup need to be done before enabling the link
|
|
|
|
* clocks.
|
2014-04-25 19:29:50 +00:00
|
|
|
*/
|
2015-04-22 22:18:39 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_CORE_CLKS, 1);
|
2015-01-29 22:39:27 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If ULPS during suspend feature is enabled, then DSI PHY was
|
|
|
|
* left on during suspend. In this case, we do not need to reset/init
|
2015-04-22 22:18:39 +00:00
|
|
|
* PHY. This would have already been done when the core clocks are
|
2015-01-29 22:39:27 +00:00
|
|
|
* turned on. However, if cont splash is disabled, the first time DSI
|
|
|
|
* is powered on, phy init needs to be done unconditionally.
|
|
|
|
*/
|
|
|
|
if (!pdata->panel_info.ulps_suspend_enabled || !ctrl_pdata->ulps) {
|
2014-12-16 00:59:12 +00:00
|
|
|
mdss_dsi_phy_sw_reset(ctrl_pdata);
|
|
|
|
mdss_dsi_phy_init(ctrl_pdata);
|
|
|
|
mdss_dsi_ctrl_setup(ctrl_pdata);
|
|
|
|
}
|
2015-10-20 11:09:28 +00:00
|
|
|
ctrl_pdata->ctrl_state |= CTRL_STATE_DSI_ACTIVE;
|
2014-12-16 00:59:12 +00:00
|
|
|
|
|
|
|
/* DSI link clocks need to be on prior to ctrl sw reset */
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_LINK_CLKS, 1);
|
2014-07-31 05:41:43 +00:00
|
|
|
mdss_dsi_sw_reset(ctrl_pdata, true);
|
2013-12-25 08:36:16 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Issue hardware reset line after enabling the DSI clocks and data
|
|
|
|
* data lanes for LP11 init
|
|
|
|
*/
|
2014-04-08 10:21:49 +00:00
|
|
|
if (mipi->lp11_init) {
|
|
|
|
if (mdss_dsi_pinctrl_set_state(ctrl_pdata, true))
|
|
|
|
pr_debug("reset enable: pinctrl not enabled\n");
|
2017-04-18 01:29:57 +00:00
|
|
|
|
2013-12-25 08:36:16 +00:00
|
|
|
mdss_dsi_panel_reset(pdata, 1);
|
2014-04-08 10:21:49 +00:00
|
|
|
}
|
2013-12-25 08:36:16 +00:00
|
|
|
|
|
|
|
if (mipi->init_delay)
|
|
|
|
usleep(mipi->init_delay);
|
2013-11-07 00:37:31 +00:00
|
|
|
|
2012-04-24 03:39:17 +00:00
|
|
|
if (mipi->force_clk_lane_hs) {
|
|
|
|
u32 tmp;
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if(mdss_dsi_is_hw_config_split(sdata) && vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init
|
|
|
|
&& mdss_dsi_is_right_ctrl(ctrl_pdata)) {
|
|
|
|
|
|
|
|
/* Force HS for DSI 0 */
|
|
|
|
if (!IS_ERR_OR_NULL(other_ctrl)) {
|
|
|
|
tmp = MIPI_INP((other_ctrl->ctrl_base) + 0xac);
|
|
|
|
tmp |= (1<<28);
|
|
|
|
MIPI_OUTP((other_ctrl->ctrl_base) + 0xac, tmp);
|
|
|
|
wmb();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Force HS for DSI 1 */
|
|
|
|
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
|
|
|
|
tmp |= (1<<28);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
|
|
|
|
wmb();
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
if (!IS_ERR_OR_NULL(vdd->dtsi_data[DISPLAY_1].upi_clk_change_tx_cmds[vdd->panel_revision].cmds)) {
|
|
|
|
|
|
|
|
struct dsi_panel_cmds *pcmds = NULL;
|
|
|
|
|
|
|
|
mutex_lock(&vdd->vdd_lock);
|
|
|
|
if (!IS_ERR_OR_NULL(other_ctrl)) {
|
|
|
|
pcmds = mdss_samsung_cmds_select(other_ctrl, PANEL_UPI_CLK_CHANGE, NULL);
|
|
|
|
if (!IS_ERR_OR_NULL(pcmds) && !IS_ERR_OR_NULL(pcmds->cmds))
|
|
|
|
mdss_dsi_panel_cmds_send(other_ctrl, pcmds);
|
|
|
|
else
|
|
|
|
pr_info("Fail to tx cmds(line : %d)\n", __LINE__);
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&vdd->vdd_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
} else if(!mdss_dsi_is_hw_config_split(sdata) ) {
|
|
|
|
#endif
|
|
|
|
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
|
|
|
|
tmp |= (1<<28);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
|
|
|
|
wmb();
|
|
|
|
}
|
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
2012-04-24 03:39:17 +00:00
|
|
|
}
|
2017-04-18 01:29:57 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if(pdata->panel_info.type == MIPI_CMD_PANEL && mdss_dsi_is_hw_config_split(sdata)
|
|
|
|
&& vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init && mdss_dsi_is_right_ctrl(ctrl_pdata) &&
|
|
|
|
!vdd->dtsi_data[ctrl_pdata->ndx].samsung_tcon_clk_on_support) {
|
|
|
|
|
|
|
|
if (!IS_ERR_OR_NULL(other_ctrl))
|
|
|
|
mdss_dsi_clk_ctrl(other_ctrl, DSI_ALL_CLKS, 0);
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
|
|
|
} else if (pdata->panel_info.type == MIPI_CMD_PANEL &&
|
|
|
|
!vdd->dtsi_data[ctrl_pdata->ndx].samsung_tcon_clk_on_support &&
|
|
|
|
!(mdss_dsi_is_hw_config_split(sdata) && vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init))
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
|
|
|
#else
|
2013-05-01 16:51:46 +00:00
|
|
|
if (pdata->panel_info.type == MIPI_CMD_PANEL)
|
2014-03-12 20:34:50 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
2017-04-18 01:29:57 +00:00
|
|
|
#endif
|
2013-05-01 16:51:46 +00:00
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
end:
|
2013-03-26 21:10:40 +00:00
|
|
|
pr_debug("%s-:\n", __func__);
|
2015-04-22 22:18:39 +00:00
|
|
|
return ret;
|
2013-03-26 21:10:40 +00:00
|
|
|
}
|
|
|
|
|
2014-03-06 02:41:31 +00:00
|
|
|
static int mdss_dsi_pinctrl_set_state(
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata,
|
|
|
|
bool active)
|
|
|
|
{
|
|
|
|
struct pinctrl_state *pin_state;
|
2015-07-06 11:23:50 +00:00
|
|
|
struct mdss_panel_info *pinfo = NULL;
|
2014-03-06 02:41:31 +00:00
|
|
|
int rc = -EFAULT;
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
struct samsung_display_driver_data *vdd = check_valid_ctrl(ctrl_pdata);
|
|
|
|
if (IS_ERR_OR_NULL(vdd)) {
|
|
|
|
pr_err("%s: Invalid data ctrl : 0x%zx\n", __func__, (size_t)vdd);
|
|
|
|
return -EINVAL;
|
|
|
|
};
|
|
|
|
#endif
|
2014-03-06 02:41:31 +00:00
|
|
|
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.pinctrl))
|
|
|
|
return PTR_ERR(ctrl_pdata->pin_res.pinctrl);
|
|
|
|
|
2015-07-06 11:23:50 +00:00
|
|
|
pinfo = &ctrl_pdata->panel_data.panel_info;
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if ((mdss_dsi_is_right_ctrl(ctrl_pdata) && !vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init &&
|
|
|
|
#else
|
2015-07-06 11:23:50 +00:00
|
|
|
if ((mdss_dsi_is_right_ctrl(ctrl_pdata) &&
|
2017-04-18 01:29:57 +00:00
|
|
|
#endif
|
2015-07-06 11:23:50 +00:00
|
|
|
mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)) ||
|
|
|
|
pinfo->is_dba_panel) {
|
|
|
|
pr_debug("%s:%d, pinctrl config not needed\n",
|
2015-05-06 07:39:44 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-03-06 02:41:31 +00:00
|
|
|
pin_state = active ? ctrl_pdata->pin_res.gpio_state_active
|
|
|
|
: ctrl_pdata->pin_res.gpio_state_suspend;
|
|
|
|
if (!IS_ERR_OR_NULL(pin_state)) {
|
|
|
|
rc = pinctrl_select_state(ctrl_pdata->pin_res.pinctrl,
|
|
|
|
pin_state);
|
|
|
|
if (rc)
|
|
|
|
pr_err("%s: can not set %s pins\n", __func__,
|
|
|
|
active ? MDSS_PINCTRL_STATE_DEFAULT
|
|
|
|
: MDSS_PINCTRL_STATE_SLEEP);
|
|
|
|
} else {
|
|
|
|
pr_err("%s: invalid '%s' pinstate\n", __func__,
|
|
|
|
active ? MDSS_PINCTRL_STATE_DEFAULT
|
|
|
|
: MDSS_PINCTRL_STATE_SLEEP);
|
|
|
|
}
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
int mdss_samsung_dsi_pinctrl_set_state(
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata, int control_number, bool active)
|
|
|
|
{
|
|
|
|
/* Prevent : "add NULL initialize code "Using uninitialized value pin_state when calling IS_ERR_OR_NULL */
|
|
|
|
struct pinctrl_state *pin_state = NULL;
|
|
|
|
int rc = -EFAULT;
|
|
|
|
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.pinctrl))
|
|
|
|
return PTR_ERR(ctrl_pdata->pin_res.pinctrl);
|
|
|
|
|
|
|
|
if (control_number == 0) {
|
|
|
|
if (active)
|
|
|
|
pin_state = ctrl_pdata->pin_res.samsung_gpio_control0_state_active;
|
|
|
|
else
|
|
|
|
pin_state = ctrl_pdata->pin_res.samsung_gpio_control0_state_suspend;
|
|
|
|
} else if (control_number == 1) {
|
|
|
|
if (active)
|
|
|
|
pin_state = ctrl_pdata->pin_res.samsung_gpio_control1_state_active;
|
|
|
|
else
|
|
|
|
pin_state = ctrl_pdata->pin_res.samsung_gpio_control1_state_suspend;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!IS_ERR_OR_NULL(pin_state)) {
|
|
|
|
rc = pinctrl_select_state(ctrl_pdata->pin_res.pinctrl,
|
|
|
|
pin_state);
|
|
|
|
if (rc)
|
|
|
|
pr_err("%s %d: can not set pins\n", __func__, __LINE__);
|
|
|
|
} else {
|
|
|
|
pr_err("%s %d: can not set pins\n", __func__, __LINE__);
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2014-03-06 02:41:31 +00:00
|
|
|
static int mdss_dsi_pinctrl_init(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata;
|
|
|
|
|
|
|
|
ctrl_pdata = platform_get_drvdata(pdev);
|
|
|
|
ctrl_pdata->pin_res.pinctrl = devm_pinctrl_get(&pdev->dev);
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.pinctrl)) {
|
|
|
|
pr_err("%s: failed to get pinctrl\n", __func__);
|
|
|
|
return PTR_ERR(ctrl_pdata->pin_res.pinctrl);
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata->pin_res.gpio_state_active
|
|
|
|
= pinctrl_lookup_state(ctrl_pdata->pin_res.pinctrl,
|
|
|
|
MDSS_PINCTRL_STATE_DEFAULT);
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.gpio_state_active))
|
|
|
|
pr_warn("%s: can not get default pinstate\n", __func__);
|
|
|
|
|
|
|
|
ctrl_pdata->pin_res.gpio_state_suspend
|
|
|
|
= pinctrl_lookup_state(ctrl_pdata->pin_res.pinctrl,
|
|
|
|
MDSS_PINCTRL_STATE_SLEEP);
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.gpio_state_suspend))
|
|
|
|
pr_warn("%s: can not get sleep pinstate\n", __func__);
|
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
/*
|
|
|
|
ctrl_pdata->pin_res.samsung_gpio_control0_state_active
|
|
|
|
= pinctrl_lookup_state(ctrl_pdata->pin_res.pinctrl,
|
|
|
|
SAMSUNG_DISPLAY_PINCTRL0_STATE_DEFAULT);
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.samsung_gpio_control0_state_active))
|
|
|
|
pr_warn("%s: can not get default pinstate\n", __func__);
|
|
|
|
|
|
|
|
ctrl_pdata->pin_res.samsung_gpio_control0_state_suspend
|
|
|
|
= pinctrl_lookup_state(ctrl_pdata->pin_res.pinctrl,
|
|
|
|
SAMSUNG_DISPLAY_PINCTRL0_STATE_SLEEP);
|
|
|
|
if (IS_ERR_OR_NULL(ctrl_pdata->pin_res.samsung_gpio_control0_state_suspend))
|
|
|
|
pr_warn("%s: can not get sleep pinstate\n", __func__);
|
|
|
|
*/
|
|
|
|
#endif
|
|
|
|
|
2014-03-06 02:41:31 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-03-26 21:10:40 +00:00
|
|
|
static int mdss_dsi_unblank(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct mipi_panel_info *mipi;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
mipi = &pdata->panel_info.mipi;
|
|
|
|
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s+: ctrl=%pK ndx=%d cur_power_state=%d\n", __func__,
|
2015-10-20 11:09:28 +00:00
|
|
|
ctrl_pdata, ctrl_pdata->ndx,
|
|
|
|
pdata->panel_info.panel_power_state);
|
2014-07-29 06:24:46 +00:00
|
|
|
|
2014-12-10 07:30:48 +00:00
|
|
|
mdss_dsi_pm_qos_update_request(DSI_DISABLE_PC_LATENCY);
|
|
|
|
|
2014-04-19 06:23:32 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
|
|
|
|
2015-10-20 11:09:28 +00:00
|
|
|
if (mdss_dsi_is_panel_on_lp(pdata)) {
|
2014-07-29 07:11:45 +00:00
|
|
|
pr_debug("%s: dsi_unblank with panel always on\n", __func__);
|
|
|
|
if (ctrl_pdata->low_power_config)
|
|
|
|
ret = ctrl_pdata->low_power_config(pdata, false);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2013-04-23 19:24:05 +00:00
|
|
|
if (!(ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT)) {
|
2014-04-09 11:45:37 +00:00
|
|
|
if (!pdata->panel_info.dynamic_switch_pending) {
|
|
|
|
ret = ctrl_pdata->on(pdata);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("%s: unable to initialize the panel\n",
|
2013-05-09 03:10:40 +00:00
|
|
|
__func__);
|
2014-04-19 06:23:32 +00:00
|
|
|
goto error;
|
2014-04-09 11:45:37 +00:00
|
|
|
}
|
2013-05-09 03:10:40 +00:00
|
|
|
}
|
2012-04-24 03:39:17 +00:00
|
|
|
}
|
|
|
|
|
2014-03-14 06:50:45 +00:00
|
|
|
if ((pdata->panel_info.type == MIPI_CMD_PANEL) &&
|
2014-10-01 08:33:20 +00:00
|
|
|
mipi->vsync_enable && mipi->hw_vsync_mode) {
|
2014-03-14 06:50:45 +00:00
|
|
|
mdss_dsi_set_tear_on(ctrl_pdata);
|
2014-10-01 08:33:20 +00:00
|
|
|
if (mdss_dsi_is_te_based_esd(ctrl_pdata))
|
|
|
|
enable_irq(gpio_to_irq(ctrl_pdata->disp_te_gpio));
|
|
|
|
}
|
2013-05-30 03:11:57 +00:00
|
|
|
|
2016-03-04 00:06:27 +00:00
|
|
|
ctrl_pdata->ctrl_state |= CTRL_STATE_PANEL_INIT;
|
2014-04-19 06:23:32 +00:00
|
|
|
error:
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
2014-12-10 07:30:48 +00:00
|
|
|
|
|
|
|
mdss_dsi_pm_qos_update_request(DSI_ENABLE_PC_LATENCY);
|
|
|
|
|
2013-03-26 21:10:40 +00:00
|
|
|
pr_debug("%s-:\n", __func__);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-07-29 06:24:46 +00:00
|
|
|
static int mdss_dsi_blank(struct mdss_panel_data *pdata, int power_state)
|
2013-03-26 21:10:40 +00:00
|
|
|
{
|
|
|
|
int ret = 0;
|
2013-05-30 03:11:57 +00:00
|
|
|
struct mipi_panel_info *mipi;
|
2013-03-26 21:10:40 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
2013-05-30 03:11:57 +00:00
|
|
|
mipi = &pdata->panel_info.mipi;
|
2013-03-26 21:10:40 +00:00
|
|
|
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s+: ctrl=%pK ndx=%d power_state=%d\n",
|
2014-07-29 06:24:46 +00:00
|
|
|
__func__, ctrl_pdata, ctrl_pdata->ndx, power_state);
|
|
|
|
|
2014-04-19 06:23:32 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
2013-12-25 08:36:16 +00:00
|
|
|
|
2014-10-30 22:03:45 +00:00
|
|
|
if (mdss_panel_is_power_on_lp(power_state)) {
|
2014-07-29 07:11:45 +00:00
|
|
|
pr_debug("%s: low power state requested\n", __func__);
|
|
|
|
if (ctrl_pdata->low_power_config)
|
|
|
|
ret = ctrl_pdata->low_power_config(pdata, true);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2013-11-29 07:42:01 +00:00
|
|
|
if (pdata->panel_info.type == MIPI_VIDEO_PANEL &&
|
|
|
|
ctrl_pdata->off_cmds.link_state == DSI_LP_MODE) {
|
2014-07-31 05:41:43 +00:00
|
|
|
mdss_dsi_sw_reset(ctrl_pdata, false);
|
2013-11-29 07:42:01 +00:00
|
|
|
mdss_dsi_host_init(pdata);
|
|
|
|
}
|
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if (pdata->panel_info.type == MIPI_CMD_PANEL)
|
|
|
|
mdss_dsi_op_mode_config(DSI_CMD_MODE, pdata);
|
|
|
|
else
|
|
|
|
mdss_dsi_op_mode_config(DSI_VIDEO_MODE, pdata);
|
|
|
|
#else
|
2013-03-26 21:10:40 +00:00
|
|
|
mdss_dsi_op_mode_config(DSI_CMD_MODE, pdata);
|
2017-04-18 01:29:57 +00:00
|
|
|
#endif
|
2013-03-26 21:10:40 +00:00
|
|
|
|
2014-04-09 11:45:37 +00:00
|
|
|
if (pdata->panel_info.dynamic_switch_pending) {
|
|
|
|
pr_info("%s: switching to %s mode\n", __func__,
|
|
|
|
(pdata->panel_info.mipi.mode ? "video" : "command"));
|
|
|
|
if (pdata->panel_info.type == MIPI_CMD_PANEL) {
|
|
|
|
ctrl_pdata->switch_mode(pdata, DSI_VIDEO_MODE);
|
|
|
|
} else if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
|
|
|
|
ctrl_pdata->switch_mode(pdata, DSI_CMD_MODE);
|
|
|
|
mdss_dsi_set_tear_off(ctrl_pdata);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-03-14 06:50:45 +00:00
|
|
|
if ((pdata->panel_info.type == MIPI_CMD_PANEL) &&
|
2014-10-01 08:33:20 +00:00
|
|
|
mipi->vsync_enable && mipi->hw_vsync_mode) {
|
|
|
|
if (mdss_dsi_is_te_based_esd(ctrl_pdata)) {
|
|
|
|
disable_irq(gpio_to_irq(
|
|
|
|
ctrl_pdata->disp_te_gpio));
|
|
|
|
atomic_dec(&ctrl_pdata->te_irq_ready);
|
|
|
|
}
|
2014-03-14 06:50:45 +00:00
|
|
|
mdss_dsi_set_tear_off(ctrl_pdata);
|
2014-10-01 08:33:20 +00:00
|
|
|
}
|
2013-05-30 03:11:57 +00:00
|
|
|
|
2013-04-23 19:24:05 +00:00
|
|
|
if (ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT) {
|
2014-04-09 11:45:37 +00:00
|
|
|
if (!pdata->panel_info.dynamic_switch_pending) {
|
|
|
|
ret = ctrl_pdata->off(pdata);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("%s: Panel OFF failed\n", __func__);
|
2014-04-19 06:23:32 +00:00
|
|
|
goto error;
|
2014-04-09 11:45:37 +00:00
|
|
|
}
|
2013-05-09 03:10:40 +00:00
|
|
|
}
|
2013-04-23 19:24:05 +00:00
|
|
|
ctrl_pdata->ctrl_state &= ~CTRL_STATE_PANEL_INIT;
|
|
|
|
}
|
2014-03-06 02:41:31 +00:00
|
|
|
|
2014-04-19 06:23:32 +00:00
|
|
|
error:
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
2013-04-23 19:24:05 +00:00
|
|
|
pr_debug("%s-:End\n", __func__);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-04-09 19:47:29 +00:00
|
|
|
static int mdss_dsi_post_panel_on(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s+: ctrl=%pK ndx=%d\n", __func__,
|
2015-04-09 19:47:29 +00:00
|
|
|
ctrl_pdata, ctrl_pdata->ndx);
|
|
|
|
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
|
|
|
|
|
|
|
if (ctrl_pdata->post_panel_on)
|
|
|
|
ctrl_pdata->post_panel_on(pdata);
|
|
|
|
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
|
|
|
pr_debug("%s-:\n", __func__);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-23 19:24:05 +00:00
|
|
|
int mdss_dsi_cont_splash_on(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct mipi_panel_info *mipi;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
|
|
|
|
pr_info("%s:%d DSI on for continuous splash.\n", __func__, __LINE__);
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
mipi = &pdata->panel_info.mipi;
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s+: ctrl=%pK ndx=%d\n", __func__,
|
2013-04-23 19:24:05 +00:00
|
|
|
ctrl_pdata, ctrl_pdata->ndx);
|
|
|
|
|
|
|
|
WARN((ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT),
|
|
|
|
"Incorrect Ctrl state=0x%x\n", ctrl_pdata->ctrl_state);
|
|
|
|
|
2014-07-31 05:41:43 +00:00
|
|
|
mdss_dsi_ctrl_setup(ctrl_pdata);
|
|
|
|
mdss_dsi_sw_reset(ctrl_pdata, true);
|
2012-12-14 06:49:58 +00:00
|
|
|
pr_debug("%s-:End\n", __func__);
|
2012-04-24 03:39:17 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-05-13 23:34:20 +00:00
|
|
|
static void __mdss_dsi_update_video_mode_total(struct mdss_panel_data *pdata,
|
|
|
|
int new_fps)
|
|
|
|
{
|
2014-08-20 15:34:27 +00:00
|
|
|
u32 hsync_period, vsync_period, ctrl_rev;
|
2014-05-13 23:34:20 +00:00
|
|
|
u32 new_dsi_v_total, current_dsi_v_total;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s Invalid pdata\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
if (ctrl_pdata == NULL) {
|
|
|
|
pr_err("%s Invalid ctrl_pdata\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vsync_period =
|
|
|
|
mdss_panel_get_vtotal(&pdata->panel_info);
|
|
|
|
hsync_period =
|
|
|
|
mdss_panel_get_htotal(&pdata->panel_info, true);
|
|
|
|
current_dsi_v_total =
|
|
|
|
MIPI_INP((ctrl_pdata->ctrl_base) + 0x2C);
|
|
|
|
new_dsi_v_total =
|
|
|
|
((vsync_period - 1) << 16) | (hsync_period - 1);
|
|
|
|
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
|
|
|
|
(current_dsi_v_total | 0x8000000));
|
|
|
|
if (new_dsi_v_total & 0x8000000) {
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
|
|
|
|
new_dsi_v_total);
|
|
|
|
} else {
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
|
|
|
|
(new_dsi_v_total | 0x8000000));
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
|
|
|
|
(new_dsi_v_total & 0x7ffffff));
|
|
|
|
}
|
2014-08-20 15:34:27 +00:00
|
|
|
ctrl_rev = MIPI_INP(ctrl_pdata->ctrl_base);
|
|
|
|
/* Flush DSI TIMING registers for 8916/8939 */
|
2015-05-06 07:39:44 +00:00
|
|
|
if (ctrl_pdata->shared_data->timing_db_mode)
|
2014-08-20 15:34:27 +00:00
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x1e4, 0x1);
|
2014-05-13 23:34:20 +00:00
|
|
|
ctrl_pdata->panel_data.panel_info.mipi.frame_rate = new_fps;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2014-08-19 16:33:30 +00:00
|
|
|
static void __mdss_dsi_dyn_refresh_config(
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
|
|
|
int reg_data;
|
|
|
|
|
|
|
|
reg_data = MIPI_INP((ctrl_pdata->ctrl_base) + DSI_DYNAMIC_REFRESH_CTRL);
|
|
|
|
reg_data &= ~BIT(12);
|
|
|
|
|
|
|
|
pr_debug("Dynamic fps ctrl = 0x%x\n", reg_data);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + DSI_DYNAMIC_REFRESH_CTRL, reg_data);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __mdss_dsi_calc_dfps_delay(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
u32 esc_clk_rate = XO_CLK_RATE;
|
|
|
|
u32 pipe_delay, pipe_delay2 = 0, pll_delay;
|
|
|
|
u32 hsync_period = 0;
|
|
|
|
u32 pclk_to_esc_ratio, byte_to_esc_ratio, hr_bit_to_esc_ratio;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
struct mdss_panel_info *pinfo = NULL;
|
|
|
|
struct mdss_dsi_phy_ctrl *pd = NULL;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s Invalid pdata\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
|
|
|
pinfo = &pdata->panel_info;
|
|
|
|
pd = &(pinfo->mipi.dsi_phy_db);
|
|
|
|
|
|
|
|
pclk_to_esc_ratio = (ctrl_pdata->pclk_rate / esc_clk_rate);
|
|
|
|
byte_to_esc_ratio = (ctrl_pdata->byte_clk_rate / esc_clk_rate);
|
|
|
|
hr_bit_to_esc_ratio = ((ctrl_pdata->byte_clk_rate * 4) / esc_clk_rate);
|
|
|
|
|
|
|
|
hsync_period = mdss_panel_get_htotal(pinfo, true);
|
|
|
|
pipe_delay = (hsync_period + 1) / pclk_to_esc_ratio;
|
|
|
|
if (pinfo->mipi.eof_bllp_power_stop == 0)
|
|
|
|
pipe_delay += (17 / pclk_to_esc_ratio) +
|
2015-01-27 22:48:37 +00:00
|
|
|
((21 + (pinfo->mipi.t_clk_pre + 1) +
|
|
|
|
(pinfo->mipi.t_clk_post + 1)) /
|
|
|
|
byte_to_esc_ratio) +
|
2014-08-19 16:33:30 +00:00
|
|
|
((((pd->timing[8] >> 1) + 1) +
|
|
|
|
((pd->timing[6] >> 1) + 1) +
|
|
|
|
((pd->timing[3] * 4) + (pd->timing[5] >> 1) + 1) +
|
|
|
|
((pd->timing[7] >> 1) + 1) +
|
|
|
|
((pd->timing[1] >> 1) + 1) +
|
|
|
|
((pd->timing[4] >> 1) + 1)) / hr_bit_to_esc_ratio);
|
|
|
|
|
|
|
|
if (pinfo->mipi.force_clk_lane_hs)
|
|
|
|
pipe_delay2 = (6 / byte_to_esc_ratio) +
|
|
|
|
((((pd->timing[1] >> 1) + 1) +
|
|
|
|
((pd->timing[4] >> 1) + 1)) / hr_bit_to_esc_ratio);
|
|
|
|
|
2015-01-27 22:48:37 +00:00
|
|
|
/* 130 us pll delay recommended by h/w doc */
|
|
|
|
pll_delay = ((130 * esc_clk_rate) / 1000000) * 2;
|
2014-08-19 16:33:30 +00:00
|
|
|
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + DSI_DYNAMIC_REFRESH_PIPE_DELAY,
|
|
|
|
pipe_delay);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + DSI_DYNAMIC_REFRESH_PIPE_DELAY2,
|
|
|
|
pipe_delay2);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + DSI_DYNAMIC_REFRESH_PLL_DELAY,
|
|
|
|
pll_delay);
|
|
|
|
}
|
|
|
|
|
2014-05-13 23:34:20 +00:00
|
|
|
static int __mdss_dsi_dfps_update_clks(struct mdss_panel_data *pdata,
|
|
|
|
int new_fps)
|
2013-08-27 20:18:08 +00:00
|
|
|
{
|
|
|
|
int rc = 0;
|
2014-08-19 16:33:30 +00:00
|
|
|
u32 data;
|
2013-08-27 20:18:08 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
|
2014-05-13 23:34:20 +00:00
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s Invalid pdata\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
if (ctrl_pdata == NULL) {
|
|
|
|
pr_err("%s Invalid ctrl_pdata\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = mdss_dsi_clk_div_config
|
|
|
|
(&ctrl_pdata->panel_data.panel_info, new_fps);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: unable to initialize the clk dividers\n",
|
|
|
|
__func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pdata->panel_info.dfps_update
|
|
|
|
== DFPS_IMMEDIATE_CLK_UPDATE_MODE) {
|
2014-08-19 16:33:30 +00:00
|
|
|
__mdss_dsi_dyn_refresh_config(ctrl_pdata);
|
|
|
|
__mdss_dsi_calc_dfps_delay(pdata);
|
|
|
|
ctrl_pdata->pclk_rate =
|
|
|
|
pdata->panel_info.mipi.dsi_pclk_rate;
|
|
|
|
ctrl_pdata->byte_clk_rate =
|
|
|
|
pdata->panel_info.clk_rate / 8;
|
|
|
|
|
|
|
|
pr_debug("byte_rate=%i\n", ctrl_pdata->byte_clk_rate);
|
|
|
|
pr_debug("pclk_rate=%i\n", ctrl_pdata->pclk_rate);
|
|
|
|
|
2014-09-11 19:11:03 +00:00
|
|
|
if (mdss_dsi_is_ctrl_clk_slave(ctrl_pdata)) {
|
|
|
|
pr_debug("%s DFPS already updated.\n", __func__);
|
2015-01-28 19:07:05 +00:00
|
|
|
ctrl_pdata->panel_data.panel_info.mipi.frame_rate =
|
|
|
|
new_fps;
|
2014-09-11 19:11:03 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2014-08-19 16:33:30 +00:00
|
|
|
/* add an extra reference to main clks */
|
|
|
|
clk_prepare_enable(ctrl_pdata->pll_byte_clk);
|
|
|
|
clk_prepare_enable(ctrl_pdata->pll_pixel_clk);
|
|
|
|
|
|
|
|
/* change the parent to shadow clocks*/
|
|
|
|
clk_set_parent(ctrl_pdata->mux_byte_clk,
|
|
|
|
ctrl_pdata->shadow_byte_clk);
|
|
|
|
clk_set_parent(ctrl_pdata->mux_pixel_clk,
|
|
|
|
ctrl_pdata->shadow_pixel_clk);
|
|
|
|
|
|
|
|
rc = clk_set_rate(ctrl_pdata->byte_clk,
|
|
|
|
ctrl_pdata->byte_clk_rate);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: dsi_byte_clk - clk_set_rate failed\n",
|
|
|
|
__func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = clk_set_rate(ctrl_pdata->pixel_clk, ctrl_pdata->pclk_rate);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: dsi_pixel_clk - clk_set_rate failed\n",
|
|
|
|
__func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-01-28 19:07:05 +00:00
|
|
|
rc = mdss_dsi_en_wait4dynamic_done(ctrl_pdata);
|
2014-08-19 16:33:30 +00:00
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + DSI_DYNAMIC_REFRESH_CTRL,
|
|
|
|
0x00);
|
|
|
|
|
|
|
|
data = MIPI_INP((ctrl_pdata->ctrl_base) + 0x0120);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x120, data);
|
|
|
|
pr_debug("pll unlock: 0x%x\n", data);
|
|
|
|
clk_set_parent(ctrl_pdata->mux_byte_clk,
|
|
|
|
ctrl_pdata->pll_byte_clk);
|
|
|
|
clk_set_parent(ctrl_pdata->mux_pixel_clk,
|
|
|
|
ctrl_pdata->pll_pixel_clk);
|
|
|
|
clk_disable_unprepare(ctrl_pdata->pll_byte_clk);
|
|
|
|
clk_disable_unprepare(ctrl_pdata->pll_pixel_clk);
|
2015-01-28 19:07:05 +00:00
|
|
|
|
|
|
|
if (!rc)
|
|
|
|
ctrl_pdata->panel_data.panel_info.mipi.frame_rate =
|
|
|
|
new_fps;
|
2014-08-19 16:33:30 +00:00
|
|
|
} else {
|
|
|
|
ctrl_pdata->pclk_rate =
|
|
|
|
pdata->panel_info.mipi.dsi_pclk_rate;
|
|
|
|
ctrl_pdata->byte_clk_rate =
|
|
|
|
pdata->panel_info.clk_rate / 8;
|
2014-05-13 23:34:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_dfps_config(struct mdss_panel_data *pdata, int new_fps)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
struct mdss_dsi_ctrl_pdata *sctrl_pdata = NULL;
|
2014-07-03 21:20:13 +00:00
|
|
|
struct mdss_panel_info *pinfo;
|
2014-05-13 23:34:20 +00:00
|
|
|
|
2013-08-27 20:18:08 +00:00
|
|
|
pr_debug("%s+:\n", __func__);
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
2013-09-20 20:47:01 +00:00
|
|
|
panel_data);
|
2013-08-27 20:18:08 +00:00
|
|
|
|
|
|
|
if (!ctrl_pdata->panel_data.panel_info.dynamic_fps) {
|
|
|
|
pr_err("%s: Dynamic fps not enabled for this panel\n",
|
|
|
|
__func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-05-13 23:34:20 +00:00
|
|
|
/*
|
2014-07-03 21:20:13 +00:00
|
|
|
* at split display case, DFPS registers were already programmed
|
|
|
|
* while programming the left ctrl(DSI0). Ignore right ctrl (DSI1)
|
|
|
|
* reguest.
|
2014-05-13 23:34:20 +00:00
|
|
|
*/
|
2014-07-03 21:20:13 +00:00
|
|
|
pinfo = &pdata->panel_info;
|
2015-05-06 07:39:44 +00:00
|
|
|
if (mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)) {
|
2014-07-03 21:20:13 +00:00
|
|
|
if (mdss_dsi_is_right_ctrl(ctrl_pdata)) {
|
|
|
|
pr_debug("%s DFPS already updated.\n", __func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
/* left ctrl to get right ctrl */
|
|
|
|
sctrl_pdata = mdss_dsi_get_other_ctrl(ctrl_pdata);
|
2014-05-13 23:34:20 +00:00
|
|
|
}
|
|
|
|
|
2015-05-13 03:21:32 +00:00
|
|
|
ctrl_pdata->dfps_status = true;
|
|
|
|
if (sctrl_pdata)
|
|
|
|
sctrl_pdata->dfps_status = true;
|
|
|
|
|
2013-08-27 20:18:08 +00:00
|
|
|
if (new_fps !=
|
|
|
|
ctrl_pdata->panel_data.panel_info.mipi.frame_rate) {
|
|
|
|
if (pdata->panel_info.dfps_update
|
2014-10-31 22:58:12 +00:00
|
|
|
== DFPS_IMMEDIATE_PORCH_UPDATE_MODE_HFP ||
|
|
|
|
pdata->panel_info.dfps_update
|
|
|
|
== DFPS_IMMEDIATE_PORCH_UPDATE_MODE_VFP) {
|
2014-05-13 23:34:20 +00:00
|
|
|
|
|
|
|
__mdss_dsi_update_video_mode_total(pdata, new_fps);
|
|
|
|
if (sctrl_pdata) {
|
|
|
|
pr_debug("%s Updating slave ctrl DFPS\n",
|
|
|
|
__func__);
|
|
|
|
__mdss_dsi_update_video_mode_total(
|
|
|
|
&sctrl_pdata->panel_data,
|
|
|
|
new_fps);
|
2014-01-17 11:19:22 +00:00
|
|
|
}
|
2014-05-13 23:34:20 +00:00
|
|
|
|
2014-01-17 11:19:22 +00:00
|
|
|
} else {
|
2014-05-13 23:34:20 +00:00
|
|
|
rc = __mdss_dsi_dfps_update_clks(pdata, new_fps);
|
|
|
|
if (!rc && sctrl_pdata) {
|
|
|
|
pr_debug("%s Updating slave ctrl DFPS\n",
|
|
|
|
__func__);
|
|
|
|
rc = __mdss_dsi_dfps_update_clks(
|
|
|
|
&sctrl_pdata->panel_data,
|
|
|
|
new_fps);
|
2014-01-17 11:19:22 +00:00
|
|
|
}
|
2013-08-27 20:18:08 +00:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pr_debug("%s: Panel is already at this FPS\n", __func__);
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2014-05-01 23:02:48 +00:00
|
|
|
static int mdss_dsi_ctl_partial_roi(struct mdss_panel_data *pdata)
|
2013-09-20 20:47:01 +00:00
|
|
|
{
|
2014-05-01 23:02:48 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2013-09-20 20:47:01 +00:00
|
|
|
int rc = -EINVAL;
|
2014-05-01 23:02:48 +00:00
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-02 01:08:11 +00:00
|
|
|
if (!pdata->panel_info.partial_update_enabled)
|
|
|
|
return 0;
|
|
|
|
|
2014-05-01 23:02:48 +00:00
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
|
|
|
if (ctrl_pdata->set_col_page_addr)
|
2015-05-02 01:08:11 +00:00
|
|
|
rc = ctrl_pdata->set_col_page_addr(pdata, false);
|
2014-05-01 23:02:48 +00:00
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_set_stream_size(struct mdss_panel_data *pdata)
|
|
|
|
{
|
2015-05-12 15:35:44 +00:00
|
|
|
u32 stream_ctrl, stream_total, idle;
|
2013-09-20 20:47:01 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2014-05-01 23:02:48 +00:00
|
|
|
struct mdss_panel_info *pinfo;
|
2015-05-12 15:35:44 +00:00
|
|
|
struct dsc_desc *dsc = NULL;
|
2014-05-01 23:02:48 +00:00
|
|
|
struct mdss_rect *roi;
|
|
|
|
struct panel_horizontal_idle *pidle;
|
|
|
|
int i;
|
2013-09-20 20:47:01 +00:00
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
2014-05-01 23:02:48 +00:00
|
|
|
pinfo = &pdata->panel_info;
|
|
|
|
|
2015-02-10 21:51:54 +00:00
|
|
|
if (!pinfo->partial_update_supported)
|
2014-05-01 23:02:48 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2015-05-12 15:35:44 +00:00
|
|
|
if (pinfo->compression_mode == COMPRESSION_DSC)
|
|
|
|
dsc = &pinfo->dsc;
|
|
|
|
|
2014-05-01 23:02:48 +00:00
|
|
|
roi = &pinfo->roi;
|
|
|
|
|
2015-05-12 15:35:44 +00:00
|
|
|
if (dsc) {
|
|
|
|
stream_ctrl = ((dsc->bytes_in_slice + 1) << 16) |
|
|
|
|
(pdata->panel_info.mipi.vc << 8) | DTYPE_DCS_LWRITE;
|
|
|
|
stream_total = roi->h << 16 | dsc->pclk_per_line;
|
|
|
|
} else {
|
|
|
|
|
|
|
|
stream_ctrl = (((roi->w * 3) + 1) << 16) |
|
2013-09-20 20:47:01 +00:00
|
|
|
(pdata->panel_info.mipi.vc << 8) | DTYPE_DCS_LWRITE;
|
2015-05-12 15:35:44 +00:00
|
|
|
stream_total = roi->h << 16 | roi->w;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DSI_COMMAND_MODE_MDP_STREAM_CTRL */
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x60, stream_ctrl);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x58, stream_ctrl);
|
2013-09-20 20:47:01 +00:00
|
|
|
|
|
|
|
/* DSI_COMMAND_MODE_MDP_STREAM_TOTAL */
|
2015-05-12 15:35:44 +00:00
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x64, stream_total);
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x5C, stream_total);
|
2013-09-20 20:47:01 +00:00
|
|
|
|
2014-05-01 23:02:48 +00:00
|
|
|
/* set idle control -- dsi clk cycle */
|
|
|
|
idle = 0;
|
|
|
|
pidle = ctrl_pdata->line_idle;
|
|
|
|
for (i = 0; i < ctrl_pdata->horizontal_idle_cnt; i++) {
|
|
|
|
if (roi->w > pidle->min && roi->w <= pidle->max) {
|
|
|
|
idle = pidle->idle;
|
|
|
|
pr_debug("%s: ndx=%d w=%d range=%d-%d idle=%d\n",
|
|
|
|
__func__, ctrl_pdata->ndx, roi->w,
|
|
|
|
pidle->min, pidle->max, pidle->idle);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
pidle++;
|
2013-09-20 20:47:01 +00:00
|
|
|
}
|
|
|
|
|
2014-05-01 23:02:48 +00:00
|
|
|
if (idle)
|
|
|
|
idle |= BIT(12); /* enable */
|
|
|
|
|
|
|
|
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x194, idle);
|
|
|
|
|
|
|
|
return 0;
|
2013-09-20 20:47:01 +00:00
|
|
|
}
|
|
|
|
|
2015-05-02 01:08:11 +00:00
|
|
|
static int mdss_dsi_reset_write_ptr(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
|
|
|
struct mdss_panel_info *pinfo;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
|
|
|
|
|
|
|
pinfo = &ctrl_pdata->panel_data.panel_info;
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
|
|
|
/* Need to reset the DSI core since the pixel stream was stopped. */
|
|
|
|
mdss_dsi_sw_reset(ctrl_pdata, true);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset the partial update co-ordinates to the panel height and
|
|
|
|
* width
|
|
|
|
*/
|
|
|
|
if (pinfo->dcs_cmd_by_left && (ctrl_pdata->ndx == 1))
|
|
|
|
goto skip_cmd_send;
|
|
|
|
|
|
|
|
pinfo->roi.x = 0;
|
|
|
|
pinfo->roi.y = 0;
|
|
|
|
pinfo->roi.w = pinfo->xres;
|
|
|
|
if (pinfo->dcs_cmd_by_left)
|
|
|
|
pinfo->roi.w = pinfo->xres;
|
|
|
|
if (pdata->next)
|
|
|
|
pinfo->roi.w += pdata->next->panel_info.xres;
|
|
|
|
pinfo->roi.h = pinfo->yres;
|
|
|
|
|
|
|
|
mdss_dsi_set_stream_size(pdata);
|
|
|
|
|
|
|
|
if (ctrl_pdata->set_col_page_addr)
|
|
|
|
rc = ctrl_pdata->set_col_page_addr(pdata, true);
|
|
|
|
|
|
|
|
skip_cmd_send:
|
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
|
|
|
|
|
|
|
|
pr_debug("%s: DSI%d write ptr reset finished\n", __func__,
|
|
|
|
ctrl_pdata->ndx);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2014-06-11 20:52:07 +00:00
|
|
|
int mdss_dsi_register_recovery_handler(struct mdss_dsi_ctrl_pdata *ctrl,
|
2014-09-11 03:27:20 +00:00
|
|
|
struct mdss_intf_recovery *recovery)
|
2014-06-11 20:52:07 +00:00
|
|
|
{
|
|
|
|
mutex_lock(&ctrl->mutex);
|
|
|
|
ctrl->recovery = recovery;
|
|
|
|
mutex_unlock(&ctrl->mutex);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-03-04 00:06:27 +00:00
|
|
|
int mdss_dsi_register_mdp_callback(struct mdss_dsi_ctrl_pdata *ctrl,
|
|
|
|
struct mdss_intf_recovery *mdp_callback)
|
|
|
|
{
|
|
|
|
mutex_lock(&ctrl->mutex);
|
|
|
|
ctrl->mdp_callback = mdp_callback;
|
|
|
|
mutex_unlock(&ctrl->mutex);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-08-29 21:03:48 +00:00
|
|
|
static int mdss_dsi_clk_refresh(struct mdss_panel_data *pdata)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2015-08-24 15:43:21 +00:00
|
|
|
struct mdss_panel_info *pinfo = NULL;
|
|
|
|
u32 pclk_rate = 0, byte_clk_rate = 0;
|
|
|
|
u8 frame_rate = 0;
|
2014-08-29 21:03:48 +00:00
|
|
|
int rc = 0;
|
|
|
|
|
2015-08-24 15:43:21 +00:00
|
|
|
if (!pdata) {
|
|
|
|
pr_err("%s: invalid panel data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-08-29 21:03:48 +00:00
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
2015-08-24 15:43:21 +00:00
|
|
|
pinfo = &pdata->panel_info;
|
|
|
|
|
|
|
|
if (!ctrl_pdata || !pinfo) {
|
|
|
|
pr_err("%s: invalid ctrl data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Back-up current values for error cases */
|
|
|
|
frame_rate = pinfo->mipi.frame_rate;
|
|
|
|
pclk_rate = ctrl_pdata->pclk_rate;
|
|
|
|
byte_clk_rate = ctrl_pdata->byte_clk_rate;
|
|
|
|
|
|
|
|
/* Re-calculate frame rate before clk config */
|
|
|
|
pinfo->mipi.frame_rate = mdss_panel_calc_frame_rate(pinfo);
|
|
|
|
pr_debug("%s: new frame rate %d\n", __func__, pinfo->mipi.frame_rate);
|
|
|
|
|
|
|
|
rc = mdss_dsi_clk_div_config(pinfo, pinfo->mipi.frame_rate);
|
2014-08-29 21:03:48 +00:00
|
|
|
if (rc) {
|
2015-08-24 15:43:21 +00:00
|
|
|
pr_err("%s: unable to initialize clk dividers\n", __func__);
|
|
|
|
goto error;
|
2014-08-29 21:03:48 +00:00
|
|
|
}
|
|
|
|
ctrl_pdata->pclk_rate = pdata->panel_info.mipi.dsi_pclk_rate;
|
|
|
|
ctrl_pdata->byte_clk_rate = pdata->panel_info.clk_rate / 8;
|
|
|
|
pr_debug("%s ctrl_pdata->byte_clk_rate=%d ctrl_pdata->pclk_rate=%d\n",
|
|
|
|
__func__, ctrl_pdata->byte_clk_rate, ctrl_pdata->pclk_rate);
|
2015-08-24 15:43:21 +00:00
|
|
|
|
|
|
|
/* phy panel timing calaculation */
|
|
|
|
mdss_dsi_get_phy_revision(ctrl_pdata);
|
|
|
|
rc = mdss_dsi_phy_calc_timing_param(pinfo,
|
|
|
|
ctrl_pdata->shared_data->phy_rev, pinfo->mipi.frame_rate);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: unable to calculate phy timings\n", __func__);
|
|
|
|
/* Restore */
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctrl_pdata->refresh_clk_rate = false;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error:
|
|
|
|
/* Restore previous values before exiting */
|
|
|
|
pinfo->mipi.frame_rate = frame_rate;
|
|
|
|
ctrl_pdata->pclk_rate = pclk_rate;
|
|
|
|
ctrl_pdata->byte_clk_rate = byte_clk_rate;
|
|
|
|
ctrl_pdata->refresh_clk_rate = false;
|
2014-08-29 21:03:48 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
static void mdss_dsi_dba_work(struct work_struct *work)
|
2015-05-13 05:19:25 +00:00
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2015-05-28 21:31:48 +00:00
|
|
|
struct delayed_work *dw = to_delayed_work(work);
|
|
|
|
struct mdss_dba_utils_init_data utils_init_data;
|
|
|
|
struct mdss_panel_info *pinfo;
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
ctrl_pdata = container_of(dw, struct mdss_dsi_ctrl_pdata, dba_work);
|
2015-05-19 01:26:44 +00:00
|
|
|
if (!ctrl_pdata) {
|
2015-05-28 21:31:48 +00:00
|
|
|
pr_err("%s: invalid ctrl data\n", __func__);
|
2015-05-19 01:26:44 +00:00
|
|
|
return;
|
|
|
|
}
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
pinfo = &ctrl_pdata->panel_data.panel_info;
|
|
|
|
if (!pinfo) {
|
|
|
|
pr_err("%s: invalid ctrl data\n", __func__);
|
2015-05-13 05:19:25 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
memset(&utils_init_data, 0, sizeof(utils_init_data));
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
utils_init_data.chip_name = "adv7533";
|
|
|
|
utils_init_data.client_name = "dsi";
|
|
|
|
utils_init_data.instance_id = 0;
|
2015-06-26 21:16:48 +00:00
|
|
|
utils_init_data.fb_node = ctrl_pdata->fb_node;
|
2015-05-28 21:31:48 +00:00
|
|
|
utils_init_data.kobj = ctrl_pdata->kobj;
|
|
|
|
utils_init_data.pinfo = pinfo;
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
pinfo->dba_data = mdss_dba_utils_init(&utils_init_data);
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-07-20 16:38:29 +00:00
|
|
|
if (!IS_ERR_OR_NULL(pinfo->dba_data)) {
|
2015-05-28 21:31:48 +00:00
|
|
|
ctrl_pdata->ds_registered = true;
|
2015-07-20 16:38:29 +00:00
|
|
|
} else {
|
|
|
|
pr_debug("%s: dba device not ready, queue again\n", __func__);
|
|
|
|
queue_delayed_work(ctrl_pdata->workq,
|
|
|
|
&ctrl_pdata->dba_work, HZ);
|
|
|
|
}
|
2015-05-13 05:19:25 +00:00
|
|
|
}
|
|
|
|
|
2015-08-17 09:20:46 +00:00
|
|
|
static int mdss_dsi_check_params(struct mdss_dsi_ctrl_pdata *ctrl, void *arg)
|
|
|
|
{
|
2015-08-24 15:43:21 +00:00
|
|
|
struct mdss_panel_info *var_pinfo, *pinfo;
|
2015-08-17 09:20:46 +00:00
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (!ctrl || !arg)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
pinfo = &ctrl->panel_data.panel_info;
|
|
|
|
if (!pinfo->is_pluggable)
|
|
|
|
return 0;
|
|
|
|
|
2015-08-24 15:43:21 +00:00
|
|
|
var_pinfo = (struct mdss_panel_info *)arg;
|
2015-08-17 09:20:46 +00:00
|
|
|
|
|
|
|
pr_debug("%s: reconfig xres: %d yres: %d, current xres: %d yres: %d\n",
|
2015-08-24 15:43:21 +00:00
|
|
|
__func__, var_pinfo->xres, var_pinfo->yres,
|
2015-08-17 09:20:46 +00:00
|
|
|
pinfo->xres, pinfo->yres);
|
2015-08-24 15:43:21 +00:00
|
|
|
if ((var_pinfo->xres != pinfo->xres) ||
|
|
|
|
(var_pinfo->yres != pinfo->yres) ||
|
|
|
|
(var_pinfo->lcdc.h_back_porch != pinfo->lcdc.h_back_porch) ||
|
|
|
|
(var_pinfo->lcdc.h_front_porch != pinfo->lcdc.h_front_porch) ||
|
|
|
|
(var_pinfo->lcdc.h_pulse_width != pinfo->lcdc.h_pulse_width) ||
|
|
|
|
(var_pinfo->lcdc.v_back_porch != pinfo->lcdc.v_back_porch) ||
|
|
|
|
(var_pinfo->lcdc.v_front_porch != pinfo->lcdc.v_front_porch) ||
|
|
|
|
(var_pinfo->lcdc.v_pulse_width != pinfo->lcdc.v_pulse_width)
|
|
|
|
)
|
2015-08-17 09:20:46 +00:00
|
|
|
rc = 1;
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2012-11-06 00:51:27 +00:00
|
|
|
static int mdss_dsi_event_handler(struct mdss_panel_data *pdata,
|
|
|
|
int event, void *arg)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
2013-01-25 19:30:25 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2015-05-28 21:31:48 +00:00
|
|
|
struct fb_info *fbi;
|
2014-07-29 06:24:46 +00:00
|
|
|
int power_state;
|
2015-01-21 18:36:24 +00:00
|
|
|
u32 mode;
|
2012-11-06 00:51:27 +00:00
|
|
|
|
2013-01-25 19:30:25 +00:00
|
|
|
if (pdata == NULL) {
|
|
|
|
pr_err("%s: Invalid input data\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
|
|
|
|
panel_data);
|
2014-10-10 15:42:43 +00:00
|
|
|
pr_debug("%s+: ctrl=%d event=%d\n", __func__, ctrl_pdata->ndx, event);
|
2013-03-26 21:10:40 +00:00
|
|
|
|
2014-03-26 05:10:03 +00:00
|
|
|
MDSS_XLOG(event, arg, ctrl_pdata->ndx, 0x3333);
|
|
|
|
|
2012-11-06 00:51:27 +00:00
|
|
|
switch (event) {
|
2014-08-29 21:03:48 +00:00
|
|
|
case MDSS_EVENT_CHECK_PARAMS:
|
|
|
|
pr_debug("%s:Entered Case MDSS_EVENT_CHECK_PARAMS\n", __func__);
|
2015-08-24 15:43:21 +00:00
|
|
|
if (mdss_dsi_check_params(ctrl_pdata, arg)) {
|
|
|
|
ctrl_pdata->refresh_clk_rate = true;
|
2015-08-17 09:20:46 +00:00
|
|
|
rc = 1;
|
2015-08-24 15:43:21 +00:00
|
|
|
}
|
2014-08-29 21:03:48 +00:00
|
|
|
break;
|
2014-10-10 15:42:43 +00:00
|
|
|
case MDSS_EVENT_LINK_READY:
|
2015-06-01 13:30:51 +00:00
|
|
|
if (ctrl_pdata->refresh_clk_rate)
|
|
|
|
rc = mdss_dsi_clk_refresh(pdata);
|
|
|
|
|
2015-05-02 04:32:35 +00:00
|
|
|
mdss_dsi_get_hw_revision(ctrl_pdata);
|
2015-08-24 15:43:21 +00:00
|
|
|
mdss_dsi_get_phy_revision(ctrl_pdata);
|
2013-03-26 21:10:40 +00:00
|
|
|
rc = mdss_dsi_on(pdata);
|
2013-07-23 17:35:48 +00:00
|
|
|
mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,
|
|
|
|
pdata);
|
2014-10-10 15:42:43 +00:00
|
|
|
break;
|
|
|
|
case MDSS_EVENT_UNBLANK:
|
2013-05-06 16:06:20 +00:00
|
|
|
if (ctrl_pdata->on_cmds.link_state == DSI_LP_MODE)
|
2013-03-26 21:10:40 +00:00
|
|
|
rc = mdss_dsi_unblank(pdata);
|
2012-11-06 00:51:27 +00:00
|
|
|
break;
|
2015-04-09 19:47:29 +00:00
|
|
|
case MDSS_EVENT_POST_PANEL_ON:
|
|
|
|
rc = mdss_dsi_post_panel_on(pdata);
|
|
|
|
break;
|
2013-03-26 21:10:40 +00:00
|
|
|
case MDSS_EVENT_PANEL_ON:
|
2013-04-23 19:24:05 +00:00
|
|
|
ctrl_pdata->ctrl_state |= CTRL_STATE_MDP_ACTIVE;
|
2013-05-06 16:06:20 +00:00
|
|
|
if (ctrl_pdata->on_cmds.link_state == DSI_HS_MODE)
|
2013-03-26 21:10:40 +00:00
|
|
|
rc = mdss_dsi_unblank(pdata);
|
2015-01-09 04:59:53 +00:00
|
|
|
pdata->panel_info.esd_rdy = true;
|
2013-03-26 21:10:40 +00:00
|
|
|
break;
|
2012-11-06 00:51:27 +00:00
|
|
|
case MDSS_EVENT_BLANK:
|
2014-07-29 06:24:46 +00:00
|
|
|
power_state = (int) (unsigned long) arg;
|
2013-05-06 16:06:20 +00:00
|
|
|
if (ctrl_pdata->off_cmds.link_state == DSI_HS_MODE)
|
2014-07-29 06:24:46 +00:00
|
|
|
rc = mdss_dsi_blank(pdata, power_state);
|
2012-11-06 00:51:27 +00:00
|
|
|
break;
|
2013-03-26 21:10:40 +00:00
|
|
|
case MDSS_EVENT_PANEL_OFF:
|
2014-07-29 06:24:46 +00:00
|
|
|
power_state = (int) (unsigned long) arg;
|
2013-04-23 19:24:05 +00:00
|
|
|
ctrl_pdata->ctrl_state &= ~CTRL_STATE_MDP_ACTIVE;
|
2013-05-06 16:06:20 +00:00
|
|
|
if (ctrl_pdata->off_cmds.link_state == DSI_LP_MODE)
|
2014-07-29 06:24:46 +00:00
|
|
|
rc = mdss_dsi_blank(pdata, power_state);
|
|
|
|
rc = mdss_dsi_off(pdata, power_state);
|
2012-11-06 00:51:27 +00:00
|
|
|
break;
|
2013-02-01 03:36:15 +00:00
|
|
|
case MDSS_EVENT_CONT_SPLASH_FINISH:
|
2013-11-29 07:42:01 +00:00
|
|
|
if (ctrl_pdata->off_cmds.link_state == DSI_LP_MODE)
|
2014-07-29 06:24:46 +00:00
|
|
|
rc = mdss_dsi_blank(pdata, MDSS_PANEL_POWER_OFF);
|
2013-04-23 19:24:05 +00:00
|
|
|
ctrl_pdata->ctrl_state &= ~CTRL_STATE_MDP_ACTIVE;
|
2013-11-29 07:42:01 +00:00
|
|
|
rc = mdss_dsi_cont_splash_on(pdata);
|
2013-02-01 03:36:15 +00:00
|
|
|
break;
|
2013-05-01 16:51:46 +00:00
|
|
|
case MDSS_EVENT_PANEL_CLK_CTRL:
|
2013-11-21 19:41:18 +00:00
|
|
|
mdss_dsi_clk_req(ctrl_pdata, (int) (unsigned long) arg);
|
2013-05-01 16:51:46 +00:00
|
|
|
break;
|
|
|
|
case MDSS_EVENT_DSI_CMDLIST_KOFF:
|
|
|
|
mdss_dsi_cmdlist_commit(ctrl_pdata, 1);
|
2013-10-17 00:37:15 +00:00
|
|
|
break;
|
2013-08-27 20:18:08 +00:00
|
|
|
case MDSS_EVENT_PANEL_UPDATE_FPS:
|
|
|
|
if (arg != NULL) {
|
2013-11-21 19:41:18 +00:00
|
|
|
rc = mdss_dsi_dfps_config(pdata,
|
|
|
|
(int) (unsigned long) arg);
|
2013-08-27 20:18:08 +00:00
|
|
|
pr_debug("%s:update fps to = %d\n",
|
2013-11-21 19:41:18 +00:00
|
|
|
__func__, (int) (unsigned long) arg);
|
2013-08-27 20:18:08 +00:00
|
|
|
}
|
2013-05-01 16:51:46 +00:00
|
|
|
break;
|
2013-04-23 19:24:05 +00:00
|
|
|
case MDSS_EVENT_CONT_SPLASH_BEGIN:
|
|
|
|
if (ctrl_pdata->off_cmds.link_state == DSI_HS_MODE) {
|
|
|
|
/* Panel is Enabled in Bootloader */
|
2014-07-29 06:24:46 +00:00
|
|
|
rc = mdss_dsi_blank(pdata, MDSS_PANEL_POWER_OFF);
|
2013-04-23 19:24:05 +00:00
|
|
|
}
|
|
|
|
break;
|
2014-05-01 23:02:48 +00:00
|
|
|
case MDSS_EVENT_ENABLE_PARTIAL_ROI:
|
|
|
|
rc = mdss_dsi_ctl_partial_roi(pdata);
|
|
|
|
break;
|
2015-05-02 01:08:11 +00:00
|
|
|
case MDSS_EVENT_DSI_RESET_WRITE_PTR:
|
|
|
|
rc = mdss_dsi_reset_write_ptr(pdata);
|
|
|
|
break;
|
2014-05-01 23:02:48 +00:00
|
|
|
case MDSS_EVENT_DSI_STREAM_SIZE:
|
|
|
|
rc = mdss_dsi_set_stream_size(pdata);
|
2013-09-20 20:47:01 +00:00
|
|
|
break;
|
2015-01-21 18:36:24 +00:00
|
|
|
case MDSS_EVENT_DSI_UPDATE_PANEL_DATA:
|
2014-04-09 11:45:37 +00:00
|
|
|
rc = mdss_dsi_update_panel_config(ctrl_pdata,
|
|
|
|
(int)(unsigned long) arg);
|
|
|
|
break;
|
2014-06-11 20:52:07 +00:00
|
|
|
case MDSS_EVENT_REGISTER_RECOVERY_HANDLER:
|
|
|
|
rc = mdss_dsi_register_recovery_handler(ctrl_pdata,
|
2014-09-11 03:27:20 +00:00
|
|
|
(struct mdss_intf_recovery *)arg);
|
2014-06-11 20:52:07 +00:00
|
|
|
break;
|
2016-03-04 00:06:27 +00:00
|
|
|
case MDSS_EVENT_REGISTER_MDP_CALLBACK:
|
|
|
|
rc = mdss_dsi_register_mdp_callback(ctrl_pdata,
|
|
|
|
(struct mdss_intf_recovery *)arg);
|
|
|
|
break;
|
2015-01-21 18:36:24 +00:00
|
|
|
case MDSS_EVENT_DSI_DYNAMIC_SWITCH:
|
|
|
|
mode = (u32)(unsigned long) arg;
|
|
|
|
mdss_dsi_switch_mode(pdata, mode);
|
|
|
|
break;
|
|
|
|
case MDSS_EVENT_DSI_RECONFIG_CMD:
|
|
|
|
mode = (u32)(unsigned long) arg;
|
|
|
|
rc = mdss_dsi_reconfig(pdata, mode);
|
|
|
|
break;
|
2015-01-08 06:53:11 +00:00
|
|
|
case MDSS_EVENT_DSI_PANEL_STATUS:
|
|
|
|
if (ctrl_pdata->check_status)
|
|
|
|
rc = ctrl_pdata->check_status(ctrl_pdata);
|
|
|
|
break;
|
2015-04-09 06:23:21 +00:00
|
|
|
case MDSS_EVENT_FB_REGISTERED:
|
|
|
|
mdss_dsi_debugfs_init(ctrl_pdata);
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
fbi = (struct fb_info *)arg;
|
|
|
|
if (!fbi || !fbi->dev)
|
|
|
|
break;
|
2015-05-13 05:19:25 +00:00
|
|
|
|
2015-05-28 21:31:48 +00:00
|
|
|
ctrl_pdata->kobj = &fbi->dev->kobj;
|
2015-06-26 21:16:48 +00:00
|
|
|
ctrl_pdata->fb_node = fbi->node;
|
2015-05-28 21:31:48 +00:00
|
|
|
|
2015-07-06 11:23:50 +00:00
|
|
|
if (IS_ENABLED(CONFIG_MSM_DBA) &&
|
|
|
|
pdata->panel_info.is_dba_panel) {
|
|
|
|
queue_delayed_work(ctrl_pdata->workq,
|
|
|
|
&ctrl_pdata->dba_work, HZ);
|
|
|
|
}
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if (ctrl_pdata->registered)
|
|
|
|
rc = ctrl_pdata->registered(pdata);
|
|
|
|
#endif
|
2015-04-09 06:23:21 +00:00
|
|
|
break;
|
2013-01-25 19:30:25 +00:00
|
|
|
default:
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
if(ctrl_pdata->event_handler)
|
|
|
|
rc = ctrl_pdata->event_handler(pdata, event, arg);
|
|
|
|
#endif
|
2013-01-25 19:30:25 +00:00
|
|
|
pr_debug("%s: unhandled event=%d\n", __func__, event);
|
|
|
|
break;
|
2012-11-06 00:51:27 +00:00
|
|
|
}
|
2013-03-26 21:10:40 +00:00
|
|
|
pr_debug("%s-:event=%d, rc=%d\n", __func__, event, rc);
|
2012-11-06 00:51:27 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2013-12-12 05:54:09 +00:00
|
|
|
static struct device_node *mdss_dsi_pref_prim_panel(
|
|
|
|
struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device_node *dsi_pan_node = NULL;
|
|
|
|
|
|
|
|
pr_debug("%s:%d: Select primary panel from dt\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
dsi_pan_node = of_parse_phandle(pdev->dev.of_node,
|
|
|
|
"qcom,dsi-pref-prim-pan", 0);
|
|
|
|
if (!dsi_pan_node)
|
|
|
|
pr_err("%s:can't find panel phandle\n", __func__);
|
|
|
|
|
|
|
|
return dsi_pan_node;
|
|
|
|
}
|
|
|
|
|
2013-06-20 00:37:50 +00:00
|
|
|
/**
|
|
|
|
* mdss_dsi_find_panel_of_node(): find device node of dsi panel
|
|
|
|
* @pdev: platform_device of the dsi ctrl node
|
|
|
|
* @panel_cfg: string containing intf specific config data
|
|
|
|
*
|
|
|
|
* Function finds the panel device node using the interface
|
|
|
|
* specific configuration data. This configuration data is
|
|
|
|
* could be derived from the result of bootloader's GCDB
|
|
|
|
* panel detection mechanism. If such config data doesn't
|
|
|
|
* exist then this panel returns the default panel configured
|
|
|
|
* in the device tree.
|
|
|
|
*
|
|
|
|
* returns pointer to panel node on success, NULL on error.
|
|
|
|
*/
|
|
|
|
static struct device_node *mdss_dsi_find_panel_of_node(
|
|
|
|
struct platform_device *pdev, char *panel_cfg)
|
|
|
|
{
|
2013-12-31 01:22:42 +00:00
|
|
|
int len, i;
|
|
|
|
int ctrl_id = pdev->id - 1;
|
|
|
|
char panel_name[MDSS_MAX_PANEL_LEN];
|
|
|
|
char ctrl_id_stream[3] = "0:";
|
|
|
|
char *stream = NULL, *pan = NULL;
|
2013-06-20 00:37:50 +00:00
|
|
|
struct device_node *dsi_pan_node = NULL, *mdss_node = NULL;
|
|
|
|
|
2013-12-31 01:22:42 +00:00
|
|
|
len = strlen(panel_cfg);
|
|
|
|
if (!len) {
|
2013-06-20 00:37:50 +00:00
|
|
|
/* no panel cfg chg, parse dt */
|
|
|
|
pr_debug("%s:%d: no cmd line cfg present\n",
|
|
|
|
__func__, __LINE__);
|
2013-12-31 01:22:42 +00:00
|
|
|
goto end;
|
2013-06-20 00:37:50 +00:00
|
|
|
} else {
|
2013-12-31 01:22:42 +00:00
|
|
|
if (ctrl_id == 1)
|
|
|
|
strlcpy(ctrl_id_stream, "1:", 3);
|
|
|
|
|
|
|
|
stream = strnstr(panel_cfg, ctrl_id_stream, len);
|
|
|
|
if (!stream) {
|
|
|
|
pr_err("controller config is not present\n");
|
|
|
|
goto end;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
2013-12-31 01:22:42 +00:00
|
|
|
stream += 2;
|
|
|
|
|
|
|
|
pan = strnchr(stream, strlen(stream), ':');
|
|
|
|
if (!pan) {
|
|
|
|
strlcpy(panel_name, stream, MDSS_MAX_PANEL_LEN);
|
|
|
|
} else {
|
|
|
|
for (i = 0; (stream + i) < pan; i++)
|
|
|
|
panel_name[i] = *(stream + i);
|
|
|
|
panel_name[i] = 0;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
2013-12-31 01:22:42 +00:00
|
|
|
|
2013-06-20 00:37:50 +00:00
|
|
|
pr_debug("%s:%d:%s:%s\n", __func__, __LINE__,
|
|
|
|
panel_cfg, panel_name);
|
|
|
|
|
|
|
|
mdss_node = of_parse_phandle(pdev->dev.of_node,
|
|
|
|
"qcom,mdss-mdp", 0);
|
|
|
|
|
|
|
|
if (!mdss_node) {
|
|
|
|
pr_err("%s: %d: mdss_node null\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
dsi_pan_node = of_find_node_by_name(mdss_node,
|
|
|
|
panel_name);
|
|
|
|
if (!dsi_pan_node) {
|
2013-12-12 05:54:09 +00:00
|
|
|
pr_err("%s: invalid pan node, selecting prim panel\n",
|
2013-06-20 00:37:50 +00:00
|
|
|
__func__);
|
2013-12-31 01:22:42 +00:00
|
|
|
goto end;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
2013-12-31 01:22:42 +00:00
|
|
|
return dsi_pan_node;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
2013-12-31 01:22:42 +00:00
|
|
|
end:
|
2014-10-04 01:52:28 +00:00
|
|
|
if (strcmp(panel_name, NONE_PANEL))
|
|
|
|
dsi_pan_node = mdss_dsi_pref_prim_panel(pdev);
|
2013-12-12 05:54:09 +00:00
|
|
|
|
2013-06-20 00:37:50 +00:00
|
|
|
return dsi_pan_node;
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
static struct device_node *mdss_dsi_config_panel(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = platform_get_drvdata(pdev);
|
|
|
|
char panel_cfg[MDSS_MAX_PANEL_LEN];
|
|
|
|
struct device_node *dsi_pan_node = NULL;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (!ctrl_pdata) {
|
|
|
|
pr_err("%s: Unable to get the ctrl_pdata\n", __func__);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DSI panels can be different between controllers */
|
|
|
|
rc = mdss_dsi_get_panel_cfg(panel_cfg, ctrl_pdata);
|
|
|
|
if (!rc)
|
|
|
|
/* dsi panel cfg not present */
|
|
|
|
pr_warn("%s:%d:dsi specific cfg not present\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
|
|
|
|
/* find panel device node */
|
|
|
|
dsi_pan_node = mdss_dsi_find_panel_of_node(pdev, panel_cfg);
|
|
|
|
if (!dsi_pan_node) {
|
|
|
|
pr_err("%s: can't find panel node %s\n", __func__, panel_cfg);
|
|
|
|
of_node_put(dsi_pan_node);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2015-07-07 15:27:52 +00:00
|
|
|
rc = mdss_dsi_panel_init(dsi_pan_node, ctrl_pdata);
|
2015-04-23 03:14:49 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: dsi panel init failed\n", __func__);
|
|
|
|
of_node_put(dsi_pan_node);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return dsi_pan_node;
|
|
|
|
}
|
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
static int mdss_dsi_ctrl_probe(struct platform_device *pdev)
|
2012-04-24 03:39:17 +00:00
|
|
|
{
|
2015-05-06 07:39:44 +00:00
|
|
|
int rc = 0;
|
2013-01-25 19:30:25 +00:00
|
|
|
u32 index;
|
2013-03-12 22:19:17 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
|
2013-06-20 00:37:50 +00:00
|
|
|
struct device_node *dsi_pan_node = NULL;
|
|
|
|
const char *ctrl_name;
|
2014-09-16 18:21:42 +00:00
|
|
|
struct mdss_util_intf *util;
|
2013-06-20 00:37:50 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
if (!pdev || !pdev->dev.of_node) {
|
|
|
|
pr_err("%s: pdev not found for DSI controller\n", __func__);
|
2014-09-16 18:21:42 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2015-04-23 03:14:49 +00:00
|
|
|
rc = of_property_read_u32(pdev->dev.of_node,
|
|
|
|
"cell-index", &index);
|
|
|
|
if (rc) {
|
|
|
|
dev_err(&pdev->dev, "%s: Cell-index not specified, rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
return rc;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
2013-01-25 19:30:25 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
if (index == 0)
|
|
|
|
pdev->id = 1;
|
|
|
|
else
|
|
|
|
pdev->id = 2;
|
|
|
|
|
|
|
|
ctrl_pdata = mdss_dsi_get_ctrl(index);
|
|
|
|
if (!ctrl_pdata) {
|
|
|
|
pr_err("%s: Unable to get the ctrl_pdata\n", __func__);
|
|
|
|
return -EINVAL;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
2013-01-25 19:30:25 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
platform_set_drvdata(pdev, ctrl_pdata);
|
|
|
|
|
|
|
|
util = mdss_get_util_intf();
|
|
|
|
if (util == NULL) {
|
|
|
|
pr_err("Failed to get mdss utility functions\n");
|
2014-03-14 06:42:29 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2014-09-16 18:21:42 +00:00
|
|
|
ctrl_pdata->mdss_util = util;
|
2014-10-01 08:33:20 +00:00
|
|
|
atomic_set(&ctrl_pdata->te_irq_ready, 0);
|
2014-07-18 11:51:33 +00:00
|
|
|
|
2013-06-20 00:37:50 +00:00
|
|
|
ctrl_name = of_get_property(pdev->dev.of_node, "label", NULL);
|
|
|
|
if (!ctrl_name)
|
|
|
|
pr_info("%s:%d, DSI Ctrl name not specified\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
else
|
|
|
|
pr_info("%s: DSI Ctrl name = %s\n",
|
|
|
|
__func__, ctrl_name);
|
2013-01-25 19:30:25 +00:00
|
|
|
|
2014-03-06 02:41:31 +00:00
|
|
|
rc = mdss_dsi_pinctrl_init(pdev);
|
|
|
|
if (rc)
|
|
|
|
pr_warn("%s: failed to get pin resources\n", __func__);
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
if (index == 0)
|
|
|
|
ctrl_pdata->panel_data.panel_info.pdest = DISPLAY_1;
|
|
|
|
else
|
|
|
|
ctrl_pdata->panel_data.panel_info.pdest = DISPLAY_2;
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
dsi_pan_node = mdss_dsi_config_panel(pdev);
|
2013-06-20 00:37:50 +00:00
|
|
|
if (!dsi_pan_node) {
|
2015-04-23 03:14:49 +00:00
|
|
|
pr_err("%s: panel configuration failed\n", __func__);
|
2015-05-06 07:39:44 +00:00
|
|
|
return -EINVAL;
|
2012-04-24 03:39:17 +00:00
|
|
|
}
|
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
if (!mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data) ||
|
|
|
|
(mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data) &&
|
2015-04-23 03:14:49 +00:00
|
|
|
(ctrl_pdata->panel_data.panel_info.pdest == DISPLAY_1))) {
|
|
|
|
rc = mdss_panel_parse_bl_settings(dsi_pan_node, ctrl_pdata);
|
|
|
|
if (rc) {
|
2015-07-04 18:30:25 +00:00
|
|
|
pr_warn("%s: dsi bl settings parse failed\n", __func__);
|
|
|
|
/* Panels like AMOLED and dsi2hdmi chip
|
|
|
|
* does not need backlight control.
|
|
|
|
* So we should not fail probe here.
|
|
|
|
*/
|
|
|
|
ctrl_pdata->bklt_ctrl = UNKNOWN_CTRL;
|
2015-04-23 03:14:49 +00:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ctrl_pdata->bklt_ctrl = UNKNOWN_CTRL;
|
2013-06-20 00:37:50 +00:00
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
rc = dsi_panel_device_register(pdev, dsi_pan_node, ctrl_pdata);
|
2013-06-20 00:37:50 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: dsi panel dev reg failed\n", __func__);
|
|
|
|
goto error_pan_node;
|
|
|
|
}
|
|
|
|
|
2014-10-01 08:33:20 +00:00
|
|
|
if (mdss_dsi_is_te_based_esd(ctrl_pdata)) {
|
|
|
|
rc = devm_request_irq(&pdev->dev,
|
|
|
|
gpio_to_irq(ctrl_pdata->disp_te_gpio),
|
|
|
|
hw_vsync_handler, IRQF_TRIGGER_FALLING,
|
|
|
|
"VSYNC_GPIO", ctrl_pdata);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("TE request_irq failed.\n");
|
|
|
|
goto error_pan_node;
|
|
|
|
}
|
|
|
|
disable_irq(gpio_to_irq(ctrl_pdata->disp_te_gpio));
|
|
|
|
}
|
2015-05-13 05:19:25 +00:00
|
|
|
|
|
|
|
ctrl_pdata->workq = create_workqueue("mdss_dsi_dba");
|
|
|
|
if (!ctrl_pdata->workq) {
|
|
|
|
pr_err("%s: Error creating workqueue\n", __func__);
|
|
|
|
rc = -EPERM;
|
|
|
|
goto error_pan_node;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_DELAYED_WORK(&ctrl_pdata->dba_work, mdss_dsi_dba_work);
|
|
|
|
|
2015-10-09 07:02:08 +00:00
|
|
|
mdss_dsi_pm_qos_add_request(ctrl_pdata);
|
2014-12-10 07:30:48 +00:00
|
|
|
|
2013-06-20 00:37:50 +00:00
|
|
|
pr_debug("%s: Dsi Ctrl->%d initialized\n", __func__, index);
|
2015-05-22 22:36:27 +00:00
|
|
|
|
|
|
|
if (index == 0)
|
|
|
|
ctrl_pdata->shared_data->dsi0_active = true;
|
|
|
|
else
|
|
|
|
ctrl_pdata->shared_data->dsi1_active = true;
|
|
|
|
|
2012-04-24 03:39:17 +00:00
|
|
|
return 0;
|
2013-03-12 22:19:17 +00:00
|
|
|
|
2013-06-20 00:37:50 +00:00
|
|
|
error_pan_node:
|
2015-05-27 13:56:53 +00:00
|
|
|
mdss_dsi_unregister_bl_settings(ctrl_pdata);
|
2013-06-20 00:37:50 +00:00
|
|
|
of_node_put(dsi_pan_node);
|
2015-04-23 03:14:49 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
static int mdss_dsi_parse_dt_params(struct platform_device *pdev,
|
|
|
|
struct dsi_shared_data *sdata)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
rc = of_property_read_u32(pdev->dev.of_node,
|
|
|
|
"qcom,mmss-ulp-clamp-ctrl-offset",
|
|
|
|
&sdata->ulps_clamp_ctrl_off);
|
|
|
|
if (!rc) {
|
|
|
|
rc = of_property_read_u32(pdev->dev.of_node,
|
|
|
|
"qcom,mmss-phyreset-ctrl-offset",
|
|
|
|
&sdata->ulps_phyrst_ctrl_off);
|
|
|
|
}
|
|
|
|
|
|
|
|
sdata->timing_db_mode = of_property_read_bool(
|
|
|
|
pdev->dev.of_node, "qcom,timing-db-mode");
|
|
|
|
|
|
|
|
sdata->cmd_clk_ln_recovery_en =
|
|
|
|
of_property_read_bool(pdev->dev.of_node,
|
|
|
|
"qcom,dsi-clk-ln-recovery");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
static void mdss_dsi_res_deinit(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct mdss_dsi_data *dsi_res = platform_get_drvdata(pdev);
|
2015-05-06 07:39:44 +00:00
|
|
|
struct dsi_shared_data *sdata;
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
if (!dsi_res) {
|
|
|
|
pr_err("%s: DSI root device drvdata not found\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
2013-03-12 22:19:17 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
for (i = 0; i < DSI_CTRL_MAX; i++) {
|
2015-05-28 21:31:48 +00:00
|
|
|
if (dsi_res->ctrl_pdata[i]) {
|
|
|
|
if (dsi_res->ctrl_pdata[i]->ds_registered) {
|
|
|
|
struct mdss_panel_info *pinfo =
|
|
|
|
&dsi_res->ctrl_pdata[i]->
|
|
|
|
panel_data.panel_info;
|
|
|
|
|
|
|
|
if (pinfo)
|
|
|
|
mdss_dba_utils_deinit(pinfo->dba_data);
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
devm_kfree(&pdev->dev, dsi_res->ctrl_pdata[i]);
|
2015-05-28 21:31:48 +00:00
|
|
|
}
|
2015-04-23 03:14:49 +00:00
|
|
|
}
|
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata = dsi_res->shared_data;
|
|
|
|
if (!sdata)
|
|
|
|
goto res_release;
|
|
|
|
|
|
|
|
for (i = (DSI_MAX_PM - 1); i >= DSI_CORE_PM; i--) {
|
|
|
|
if (msm_dss_config_vreg(&pdev->dev,
|
|
|
|
sdata->power_data[i].vreg_config,
|
|
|
|
sdata->power_data[i].num_vreg, 1) < 0)
|
|
|
|
pr_err("%s: failed to de-init vregs for %s\n",
|
|
|
|
__func__, __mdss_dsi_pm_name(i));
|
|
|
|
mdss_dsi_put_dt_vreg_data(&pdev->dev,
|
|
|
|
&sdata->power_data[i]);
|
|
|
|
}
|
|
|
|
|
2015-04-22 22:18:39 +00:00
|
|
|
mdss_dsi_core_clk_deinit(&pdev->dev, sdata);
|
2015-05-06 07:39:44 +00:00
|
|
|
|
|
|
|
if (sdata)
|
|
|
|
devm_kfree(&pdev->dev, sdata);
|
|
|
|
|
|
|
|
res_release:
|
2015-04-23 03:14:49 +00:00
|
|
|
if (dsi_res)
|
|
|
|
devm_kfree(&pdev->dev, dsi_res);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_res_init(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
int rc = 0, i;
|
2015-05-06 07:39:44 +00:00
|
|
|
struct dsi_shared_data *sdata;
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
mdss_dsi_res = platform_get_drvdata(pdev);
|
|
|
|
if (!mdss_dsi_res) {
|
|
|
|
mdss_dsi_res = devm_kzalloc(&pdev->dev,
|
|
|
|
sizeof(struct mdss_dsi_data),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!mdss_dsi_res) {
|
|
|
|
pr_err("%s: FAILED: cannot alloc dsi data\n",
|
|
|
|
__func__);
|
|
|
|
rc = -ENOMEM;
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
mdss_dsi_res->shared_data = devm_kzalloc(&pdev->dev,
|
|
|
|
sizeof(struct dsi_shared_data),
|
|
|
|
GFP_KERNEL);
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s Allocated shared_data=%pK\n", __func__,
|
2015-05-06 07:39:44 +00:00
|
|
|
mdss_dsi_res->shared_data);
|
|
|
|
if (!mdss_dsi_res->shared_data) {
|
|
|
|
pr_err("%s Unable to alloc mem for shared_data\n",
|
|
|
|
__func__);
|
|
|
|
rc = -ENOMEM;
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
sdata = mdss_dsi_res->shared_data;
|
|
|
|
|
|
|
|
rc = mdss_dsi_parse_dt_params(pdev, sdata);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: failed to parse mdss dsi DT params\n",
|
|
|
|
__func__);
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
|
|
|
|
2015-04-22 22:18:39 +00:00
|
|
|
rc = mdss_dsi_core_clk_init(pdev, sdata);
|
2015-05-06 07:39:44 +00:00
|
|
|
if (rc) {
|
2015-04-22 22:18:39 +00:00
|
|
|
pr_err("%s: failed to initialize DSI core clocks\n",
|
2015-05-06 07:39:44 +00:00
|
|
|
__func__);
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Parse the regulator information */
|
|
|
|
for (i = DSI_CORE_PM; i < DSI_MAX_PM; i++) {
|
|
|
|
rc = mdss_dsi_get_dt_vreg_data(&pdev->dev,
|
|
|
|
pdev->dev.of_node, &sdata->power_data[i], i);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: '%s' get_dt_vreg_data failed.rc=%d\n",
|
|
|
|
__func__, __mdss_dsi_pm_name(i), rc);
|
|
|
|
i--;
|
|
|
|
for (; i >= DSI_CORE_PM; i--)
|
|
|
|
mdss_dsi_put_dt_vreg_data(&pdev->dev,
|
|
|
|
&sdata->power_data[i]);
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rc = mdss_dsi_regulator_init(pdev, sdata);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: failed to init regulator, rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
|
|
|
|
2015-05-02 04:32:35 +00:00
|
|
|
mutex_init(&sdata->phy_reg_lock);
|
2015-07-17 17:51:06 +00:00
|
|
|
mutex_init(&sdata->pm_qos_lock);
|
2015-05-02 04:32:35 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
for (i = 0; i < DSI_CTRL_MAX; i++) {
|
|
|
|
mdss_dsi_res->ctrl_pdata[i] = devm_kzalloc(&pdev->dev,
|
|
|
|
sizeof(struct mdss_dsi_ctrl_pdata),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!mdss_dsi_res->ctrl_pdata[i]) {
|
|
|
|
pr_err("%s Unable to alloc mem for ctrl=%d\n",
|
|
|
|
__func__, i);
|
|
|
|
rc = -ENOMEM;
|
|
|
|
goto mem_fail;
|
|
|
|
}
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s Allocated ctrl_pdata[%d]=%pK\n",
|
2015-05-06 07:39:44 +00:00
|
|
|
__func__, i, mdss_dsi_res->ctrl_pdata[i]);
|
|
|
|
mdss_dsi_res->ctrl_pdata[i]->shared_data =
|
|
|
|
mdss_dsi_res->shared_data;
|
2015-04-23 03:14:49 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, mdss_dsi_res);
|
|
|
|
}
|
|
|
|
|
|
|
|
mdss_dsi_res->pdev = pdev;
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_debug("%s: Setting up mdss_dsi_res=%pK\n", __func__, mdss_dsi_res);
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
mem_fail:
|
|
|
|
mdss_dsi_res_deinit(pdev);
|
2013-03-12 22:19:17 +00:00
|
|
|
return rc;
|
2012-04-24 03:39:17 +00:00
|
|
|
}
|
|
|
|
|
2015-06-30 13:28:32 +00:00
|
|
|
static int mdss_dsi_parse_hw_cfg(struct platform_device *pdev, char *pan_cfg)
|
2015-04-23 03:14:49 +00:00
|
|
|
{
|
|
|
|
const char *data;
|
|
|
|
struct mdss_dsi_data *dsi_res = platform_get_drvdata(pdev);
|
2015-05-06 07:39:44 +00:00
|
|
|
struct dsi_shared_data *sdata;
|
2015-06-30 13:28:32 +00:00
|
|
|
char dsi_cfg[20];
|
|
|
|
char *cfg_prim = NULL, *cfg_sec = NULL;
|
|
|
|
int i = 0;
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
if (!dsi_res) {
|
|
|
|
pr_err("%s: DSI root device drvdata not found\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata = mdss_dsi_res->shared_data;
|
|
|
|
if (!sdata) {
|
|
|
|
pr_err("%s: DSI shared data not found\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
sdata->hw_config = SINGLE_DSI;
|
2015-04-23 03:14:49 +00:00
|
|
|
|
2015-06-30 13:28:32 +00:00
|
|
|
if (pan_cfg)
|
|
|
|
cfg_prim = strnstr(pan_cfg, "cfg:", strlen(pan_cfg));
|
|
|
|
if (cfg_prim) {
|
|
|
|
cfg_prim += 4;
|
|
|
|
cfg_sec = strnchr(cfg_prim, strlen(cfg_prim), ':');
|
|
|
|
if (!cfg_sec)
|
|
|
|
cfg_sec = cfg_prim + strlen(cfg_prim);
|
|
|
|
for (i = 0; (cfg_prim + i) < cfg_sec; i++)
|
|
|
|
dsi_cfg[i] = *(cfg_prim + i);
|
|
|
|
dsi_cfg[i] = '\0';
|
|
|
|
data = dsi_cfg;
|
|
|
|
} else {
|
|
|
|
data = of_get_property(pdev->dev.of_node,
|
|
|
|
"hw-config", NULL);
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
if (data) {
|
|
|
|
if (!strcmp(data, "dual_dsi"))
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata->hw_config = DUAL_DSI;
|
2015-04-23 03:14:49 +00:00
|
|
|
else if (!strcmp(data, "split_dsi"))
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata->hw_config = SPLIT_DSI;
|
2015-04-23 03:14:49 +00:00
|
|
|
else if (!strcmp(data, "single_dsi"))
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata->hw_config = SINGLE_DSI;
|
2015-04-23 03:14:49 +00:00
|
|
|
else
|
|
|
|
pr_err("%s: Incorrect string for DSI config:%s. Setting default as SINGLE_DSI\n",
|
|
|
|
__func__, data);
|
|
|
|
} else {
|
|
|
|
pr_err("%s: Error: No DSI HW config found\n",
|
|
|
|
__func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-09-09 11:50:18 +00:00
|
|
|
/*
|
|
|
|
* For certain h/w revisions, use both the DSI PLLs for
|
|
|
|
* split DSI use-cases since it is necessary to do so.
|
|
|
|
*/
|
|
|
|
if (mdss_dsi_is_hw_config_split(sdata))
|
|
|
|
sdata->split_config_independent_pll =
|
|
|
|
of_property_read_bool(pdev->dev.of_node,
|
|
|
|
"qcom,split-dsi-independent-pll");
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
pr_debug("%s: DSI h/w configuration is %d\n", __func__,
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata->hw_config);
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-06-30 13:28:32 +00:00
|
|
|
static void mdss_dsi_parse_pll_src_cfg(struct platform_device *pdev,
|
|
|
|
char *pan_cfg)
|
2015-04-22 22:18:39 +00:00
|
|
|
{
|
|
|
|
const char *data;
|
2015-06-30 13:28:32 +00:00
|
|
|
char *pll_ptr, pll_cfg[10] = {'\0'};
|
2015-04-22 22:18:39 +00:00
|
|
|
struct dsi_shared_data *sdata = mdss_dsi_res->shared_data;
|
|
|
|
|
2015-05-22 22:36:27 +00:00
|
|
|
sdata->pll_src_config = PLL_SRC_DEFAULT;
|
2015-06-30 13:28:32 +00:00
|
|
|
|
|
|
|
if (pan_cfg) {
|
|
|
|
pll_ptr = strnstr(pan_cfg, ":pll0", strlen(pan_cfg));
|
|
|
|
if (!pll_ptr) {
|
|
|
|
pll_ptr = strnstr(pan_cfg, ":pll1", strlen(pan_cfg));
|
|
|
|
if (pll_ptr)
|
|
|
|
strlcpy(pll_cfg, "PLL1", strlen(pll_cfg));
|
|
|
|
} else {
|
|
|
|
strlcpy(pll_cfg, "PLL0", strlen(pll_cfg));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
data = pll_cfg;
|
|
|
|
|
|
|
|
if (!data || !strcmp(data, ""))
|
|
|
|
data = of_get_property(pdev->dev.of_node,
|
|
|
|
"pll-src-config", NULL);
|
2015-04-22 22:18:39 +00:00
|
|
|
if (data) {
|
|
|
|
if (!strcmp(data, "PLL0"))
|
|
|
|
sdata->pll_src_config = PLL_SRC_0;
|
|
|
|
else if (!strcmp(data, "PLL1"))
|
|
|
|
sdata->pll_src_config = PLL_SRC_1;
|
|
|
|
else
|
2015-05-22 22:36:27 +00:00
|
|
|
pr_err("%s: invalid pll src config %s\n",
|
2015-04-22 22:18:39 +00:00
|
|
|
__func__, data);
|
|
|
|
} else {
|
2015-05-22 22:36:27 +00:00
|
|
|
pr_debug("%s: PLL src config not specified\n", __func__);
|
2015-04-22 22:18:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("%s: pll_src_config = %d", __func__, sdata->pll_src_config);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_validate_pll_src_config(struct dsi_shared_data *sdata)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* DSI PLL1 can only drive DSI PHY1. As such:
|
|
|
|
* - For split dsi config, only PLL0 is supported
|
|
|
|
* - For dual dsi config, DSI0-PLL0 and DSI1-PLL1 is the only
|
|
|
|
* possible configuration
|
|
|
|
*/
|
|
|
|
if (mdss_dsi_is_hw_config_split(sdata) &&
|
|
|
|
mdss_dsi_is_pll_src_pll1(sdata)) {
|
|
|
|
pr_err("%s: unsupported PLL config: using PLL1 for split-dsi\n",
|
|
|
|
__func__);
|
|
|
|
rc = -EINVAL;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2015-05-22 22:36:27 +00:00
|
|
|
if (mdss_dsi_is_hw_config_dual(sdata) &&
|
|
|
|
!mdss_dsi_is_pll_src_default(sdata)) {
|
|
|
|
pr_debug("%s: pll src config not applicable for dual-dsi\n",
|
|
|
|
__func__);
|
|
|
|
sdata->pll_src_config = PLL_SRC_DEFAULT;
|
|
|
|
}
|
|
|
|
|
2015-04-22 22:18:39 +00:00
|
|
|
error:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_validate_config(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct dsi_shared_data *sdata = mdss_dsi_res->shared_data;
|
|
|
|
|
|
|
|
return mdss_dsi_validate_pll_src_config(sdata);
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
static const struct of_device_id mdss_dsi_ctrl_dt_match[] = {
|
|
|
|
{.compatible = "qcom,mdss-dsi-ctrl"},
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mdss_dsi_ctrl_dt_match);
|
|
|
|
|
|
|
|
static int mdss_dsi_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct mdss_panel_cfg *pan_cfg = NULL;
|
|
|
|
struct mdss_util_intf *util;
|
2015-06-02 23:56:33 +00:00
|
|
|
char *panel_cfg;
|
2015-04-23 03:14:49 +00:00
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
util = mdss_get_util_intf();
|
|
|
|
if (util == NULL) {
|
|
|
|
pr_err("%s: Failed to get mdss utility functions\n", __func__);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!util->mdp_probe_done) {
|
|
|
|
pr_err("%s: MDP not probed yet!\n", __func__);
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!pdev || !pdev->dev.of_node) {
|
|
|
|
pr_err("%s: DSI driver only supports device tree probe\n",
|
|
|
|
__func__);
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
pan_cfg = util->panel_intf_type(MDSS_PANEL_INTF_HDMI);
|
|
|
|
if (IS_ERR(pan_cfg)) {
|
|
|
|
return PTR_ERR(pan_cfg);
|
|
|
|
} else if (pan_cfg) {
|
|
|
|
pr_debug("%s: HDMI is primary\n", __func__);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2015-06-02 23:56:33 +00:00
|
|
|
pan_cfg = util->panel_intf_type(MDSS_PANEL_INTF_DSI);
|
|
|
|
if (IS_ERR_OR_NULL(pan_cfg)) {
|
|
|
|
rc = PTR_ERR(pan_cfg);
|
|
|
|
goto error;
|
|
|
|
} else {
|
|
|
|
panel_cfg = pan_cfg->arg_cfg;
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
rc = mdss_dsi_res_init(pdev);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s Unable to set dsi res\n", __func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-06-30 13:28:32 +00:00
|
|
|
rc = mdss_dsi_parse_hw_cfg(pdev, panel_cfg);
|
2015-04-23 03:14:49 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s Unable to parse dsi h/w config\n", __func__);
|
|
|
|
mdss_dsi_res_deinit(pdev);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-06-30 13:28:32 +00:00
|
|
|
mdss_dsi_parse_pll_src_cfg(pdev, panel_cfg);
|
2015-04-22 22:18:39 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
of_platform_populate(pdev->dev.of_node, mdss_dsi_ctrl_dt_match,
|
|
|
|
NULL, &pdev->dev);
|
|
|
|
|
2015-04-22 22:18:39 +00:00
|
|
|
rc = mdss_dsi_validate_config(pdev);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: Invalid DSI hw configuration\n", __func__);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
mdss_dsi_config_clk_src(pdev);
|
|
|
|
|
|
|
|
error:
|
|
|
|
return rc;
|
2015-04-23 03:14:49 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
mdss_dsi_res_deinit(pdev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
static int mdss_dsi_ctrl_remove(struct platform_device *pdev)
|
2012-04-24 03:39:17 +00:00
|
|
|
{
|
|
|
|
struct msm_fb_data_type *mfd;
|
2013-03-12 22:19:17 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata = platform_get_drvdata(pdev);
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2013-03-12 22:19:17 +00:00
|
|
|
if (!ctrl_pdata) {
|
|
|
|
pr_err("%s: no driver data\n", __func__);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2015-07-17 17:51:06 +00:00
|
|
|
mdss_dsi_pm_qos_remove_request(ctrl_pdata->shared_data);
|
2014-12-10 07:30:48 +00:00
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
if (msm_dss_config_vreg(&pdev->dev,
|
|
|
|
ctrl_pdata->panel_power_data.vreg_config,
|
|
|
|
ctrl_pdata->panel_power_data.num_vreg, 1) < 0)
|
|
|
|
pr_err("%s: failed to de-init vregs for %s\n",
|
|
|
|
__func__, __mdss_dsi_pm_name(DSI_PANEL_PM));
|
|
|
|
mdss_dsi_put_dt_vreg_data(&pdev->dev, &ctrl_pdata->panel_power_data);
|
2013-12-24 23:23:11 +00:00
|
|
|
|
2012-04-24 03:39:17 +00:00
|
|
|
mfd = platform_get_drvdata(pdev);
|
2013-12-25 08:36:16 +00:00
|
|
|
msm_dss_iounmap(&ctrl_pdata->mmss_misc_io);
|
2014-02-21 06:29:51 +00:00
|
|
|
msm_dss_iounmap(&ctrl_pdata->phy_io);
|
|
|
|
msm_dss_iounmap(&ctrl_pdata->ctrl_io);
|
2015-04-09 06:23:21 +00:00
|
|
|
mdss_dsi_debugfs_cleanup(ctrl_pdata);
|
2015-05-13 05:19:25 +00:00
|
|
|
|
|
|
|
if (ctrl_pdata->workq)
|
|
|
|
destroy_workqueue(ctrl_pdata->workq);
|
|
|
|
|
2012-04-24 03:39:17 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct device dsi_dev;
|
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
int mdss_dsi_retrieve_ctrl_resources(struct platform_device *pdev, int mode,
|
2013-03-26 21:10:40 +00:00
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl)
|
2012-12-14 06:49:58 +00:00
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
u32 index;
|
|
|
|
|
|
|
|
rc = of_property_read_u32(pdev->dev.of_node, "cell-index", &index);
|
|
|
|
if (rc) {
|
|
|
|
dev_err(&pdev->dev,
|
|
|
|
"%s: Cell-index not specified, rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index == 0) {
|
|
|
|
if (mode != DISPLAY_1) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d Panel->Ctrl mapping is wrong\n",
|
2012-12-14 06:49:58 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
} else if (index == 1) {
|
|
|
|
if (mode != DISPLAY_2) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d Panel->Ctrl mapping is wrong\n",
|
2012-12-14 06:49:58 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
} else {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d Unknown Ctrl mapped to panel\n",
|
2012-12-14 06:49:58 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
2014-02-21 06:29:51 +00:00
|
|
|
rc = msm_dss_ioremap_byname(pdev, &ctrl->ctrl_io, "dsi_ctrl");
|
|
|
|
if (rc) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d unable to remap dsi ctrl resources\n",
|
2012-12-14 06:49:58 +00:00
|
|
|
__func__, __LINE__);
|
2014-02-21 06:29:51 +00:00
|
|
|
return rc;
|
2012-12-14 06:49:58 +00:00
|
|
|
}
|
|
|
|
|
2014-02-21 06:29:51 +00:00
|
|
|
ctrl->ctrl_base = ctrl->ctrl_io.base;
|
|
|
|
ctrl->reg_size = ctrl->ctrl_io.len;
|
|
|
|
|
|
|
|
rc = msm_dss_ioremap_byname(pdev, &ctrl->phy_io, "dsi_phy");
|
|
|
|
if (rc) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d unable to remap dsi phy resources\n",
|
2012-12-14 06:49:58 +00:00
|
|
|
__func__, __LINE__);
|
2014-02-21 06:29:51 +00:00
|
|
|
return rc;
|
2012-12-14 06:49:58 +00:00
|
|
|
}
|
|
|
|
|
2015-05-02 04:32:35 +00:00
|
|
|
rc = msm_dss_ioremap_byname(pdev, &ctrl->phy_regulator_io,
|
2014-11-26 23:38:10 +00:00
|
|
|
"dsi_phy_regulator");
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s:%d unable to remap dsi phy regulator resources\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_info("%s: ctrl_base=%pK ctrl_size=%x phy_base=%pK phy_size=%x\n",
|
2014-02-21 06:29:51 +00:00
|
|
|
__func__, ctrl->ctrl_base, ctrl->reg_size, ctrl->phy_io.base,
|
|
|
|
ctrl->phy_io.len);
|
2016-06-15 17:30:50 +00:00
|
|
|
pr_info("%s: phy_regulator_base=%pK phy_regulator_size=%x\n", __func__,
|
2015-05-02 04:32:35 +00:00
|
|
|
ctrl->phy_regulator_io.base, ctrl->phy_regulator_io.len);
|
2013-03-26 21:10:40 +00:00
|
|
|
|
2013-12-25 08:36:16 +00:00
|
|
|
rc = msm_dss_ioremap_byname(pdev, &ctrl->mmss_misc_io,
|
|
|
|
"mmss_misc_phys");
|
|
|
|
if (rc) {
|
2014-02-21 06:29:51 +00:00
|
|
|
pr_debug("%s:%d mmss_misc IO remap failed\n",
|
|
|
|
__func__, __LINE__);
|
2013-12-25 08:36:16 +00:00
|
|
|
}
|
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-07-29 18:02:10 +00:00
|
|
|
static int mdss_dsi_irq_init(struct device *dev, int irq_no,
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = devm_request_irq(dev, irq_no, mdss_dsi_isr,
|
|
|
|
IRQF_DISABLED, "DSI", ctrl);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("msm_dsi_irq_init request_irq() failed!\n");
|
2014-09-05 05:58:32 +00:00
|
|
|
return ret;
|
2014-07-29 18:02:10 +00:00
|
|
|
}
|
|
|
|
|
2014-09-05 05:58:32 +00:00
|
|
|
disable_irq(irq_no);
|
|
|
|
ctrl->dsi_hw->irq_info = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
|
|
|
|
if (!ctrl->dsi_hw->irq_info) {
|
|
|
|
pr_err("no mem to save irq info: kzalloc fail\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
ctrl->dsi_hw->irq_info->irq = irq_no;
|
|
|
|
ctrl->dsi_hw->irq_info->irq_ena = false;
|
|
|
|
|
2014-07-29 18:02:10 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-04-21 19:43:01 +00:00
|
|
|
static void mdss_dsi_parse_lane_swap(struct device_node *np, char *dlane_swap)
|
|
|
|
{
|
|
|
|
const char *data;
|
|
|
|
|
|
|
|
*dlane_swap = DSI_LANE_MAP_0123;
|
|
|
|
data = of_get_property(np, "qcom,lane-map", NULL);
|
|
|
|
if (data) {
|
|
|
|
if (!strcmp(data, "lane_map_3012"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_3012;
|
|
|
|
else if (!strcmp(data, "lane_map_2301"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_2301;
|
|
|
|
else if (!strcmp(data, "lane_map_1230"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_1230;
|
|
|
|
else if (!strcmp(data, "lane_map_0321"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_0321;
|
|
|
|
else if (!strcmp(data, "lane_map_1032"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_1032;
|
|
|
|
else if (!strcmp(data, "lane_map_2103"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_2103;
|
|
|
|
else if (!strcmp(data, "lane_map_3210"))
|
|
|
|
*dlane_swap = DSI_LANE_MAP_3210;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
static int mdss_dsi_parse_ctrl_params(struct platform_device *ctrl_pdev,
|
|
|
|
struct device_node *pan_node, struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
2012-04-24 03:39:17 +00:00
|
|
|
{
|
2015-05-06 07:39:44 +00:00
|
|
|
int i, len;
|
2013-07-31 01:47:33 +00:00
|
|
|
struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
|
2013-06-29 01:35:23 +00:00
|
|
|
const char *data;
|
2012-12-14 06:49:58 +00:00
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
data = of_get_property(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-strength-ctrl", &len);
|
|
|
|
if ((!data) || (len != 2)) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d, Unable to read Phy Strength ctrl settings\n",
|
2013-06-29 01:35:23 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2013-07-31 01:47:33 +00:00
|
|
|
pinfo->mipi.dsi_phy_db.strength[0] = data[0];
|
|
|
|
pinfo->mipi.dsi_phy_db.strength[1] = data[1];
|
2013-06-29 01:35:23 +00:00
|
|
|
|
2014-03-21 06:28:05 +00:00
|
|
|
pinfo->mipi.dsi_phy_db.reg_ldo_mode = of_property_read_bool(
|
|
|
|
ctrl_pdev->dev.of_node, "qcom,regulator-ldo-mode");
|
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
data = of_get_property(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-regulator-settings", &len);
|
|
|
|
if ((!data) || (len != 7)) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d, Unable to read Phy regulator settings\n",
|
2013-06-29 01:35:23 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
for (i = 0; i < len; i++) {
|
2013-07-31 01:47:33 +00:00
|
|
|
pinfo->mipi.dsi_phy_db.regulator[i]
|
2013-06-29 01:35:23 +00:00
|
|
|
= data[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
data = of_get_property(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-bist-ctrl", &len);
|
|
|
|
if ((!data) || (len != 6)) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d, Unable to read Phy Bist Ctrl settings\n",
|
2013-06-29 01:35:23 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
for (i = 0; i < len; i++) {
|
2013-07-31 01:47:33 +00:00
|
|
|
pinfo->mipi.dsi_phy_db.bistctrl[i]
|
2013-06-29 01:35:23 +00:00
|
|
|
= data[i];
|
|
|
|
}
|
2013-01-25 19:30:25 +00:00
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
data = of_get_property(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-lane-config", &len);
|
|
|
|
if ((!data) || (len != 45)) {
|
2014-07-11 22:09:12 +00:00
|
|
|
pr_err("%s:%d, Unable to read Phy lane configure settings\n",
|
2013-06-29 01:35:23 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
for (i = 0; i < len; i++) {
|
2013-07-31 01:47:33 +00:00
|
|
|
pinfo->mipi.dsi_phy_db.lanecfg[i] =
|
2013-06-29 01:35:23 +00:00
|
|
|
data[i];
|
|
|
|
}
|
|
|
|
|
2014-06-13 20:45:38 +00:00
|
|
|
ctrl_pdata->cmd_sync_wait_broadcast = of_property_read_bool(
|
|
|
|
pan_node, "qcom,cmd-sync-wait-broadcast");
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
if (ctrl_pdata->cmd_sync_wait_broadcast &&
|
2015-05-06 07:39:44 +00:00
|
|
|
mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data) &&
|
2015-04-23 03:14:49 +00:00
|
|
|
(pinfo->pdest == DISPLAY_2))
|
|
|
|
ctrl_pdata->cmd_sync_wait_trigger = true;
|
2014-06-13 20:45:38 +00:00
|
|
|
|
|
|
|
pr_debug("%s: cmd_sync_wait_enable=%d trigger=%d\n", __func__,
|
|
|
|
ctrl_pdata->cmd_sync_wait_broadcast,
|
|
|
|
ctrl_pdata->cmd_sync_wait_trigger);
|
2013-06-29 01:35:23 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
mdss_dsi_parse_lane_swap(ctrl_pdev->dev.of_node,
|
|
|
|
&(ctrl_pdata->dlane_swap));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mdss_dsi_parse_gpio_params(struct platform_device *ctrl_pdev,
|
|
|
|
struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
2014-09-22 18:11:45 +00:00
|
|
|
/*
|
|
|
|
* If disp_en_gpio has been set previously (disp_en_gpio > 0)
|
|
|
|
* while parsing the panel node, then do not override it
|
|
|
|
*/
|
|
|
|
if (ctrl_pdata->disp_en_gpio <= 0) {
|
|
|
|
ctrl_pdata->disp_en_gpio = of_get_named_gpio(
|
|
|
|
ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-enable-gpio", 0);
|
|
|
|
|
|
|
|
if (!gpio_is_valid(ctrl_pdata->disp_en_gpio))
|
|
|
|
pr_err("%s:%d, Disp_en gpio not specified\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
}
|
2012-12-14 06:49:58 +00:00
|
|
|
|
2014-10-01 08:33:20 +00:00
|
|
|
ctrl_pdata->disp_te_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-te-gpio", 0);
|
|
|
|
|
|
|
|
if (!gpio_is_valid(ctrl_pdata->disp_te_gpio))
|
|
|
|
pr_err("%s:%d, TE gpio not specified\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
|
2013-09-10 02:24:54 +00:00
|
|
|
ctrl_pdata->bklt_en_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-bklight-en-gpio", 0);
|
2013-11-21 01:25:19 +00:00
|
|
|
if (!gpio_is_valid(ctrl_pdata->bklt_en_gpio))
|
2013-09-10 02:24:54 +00:00
|
|
|
pr_info("%s: bklt_en gpio not specified\n", __func__);
|
|
|
|
|
2013-06-29 01:35:23 +00:00
|
|
|
ctrl_pdata->rst_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
|
|
|
|
"qcom,platform-reset-gpio", 0);
|
2013-11-21 01:25:19 +00:00
|
|
|
if (!gpio_is_valid(ctrl_pdata->rst_gpio))
|
2012-12-14 06:49:58 +00:00
|
|
|
pr_err("%s:%d, reset gpio not specified\n",
|
|
|
|
__func__, __LINE__);
|
|
|
|
|
2015-06-05 11:27:42 +00:00
|
|
|
ctrl_pdata->lcd_mode_sel_gpio = of_get_named_gpio(
|
|
|
|
ctrl_pdev->dev.of_node, "qcom,panel-mode-gpio", 0);
|
|
|
|
if (!gpio_is_valid(ctrl_pdata->lcd_mode_sel_gpio)) {
|
2015-07-31 09:10:58 +00:00
|
|
|
pr_info("%s:%d, mode gpio not specified\n",
|
2015-06-05 11:27:42 +00:00
|
|
|
__func__, __LINE__);
|
|
|
|
ctrl_pdata->lcd_mode_sel_gpio = -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2015-04-21 19:43:01 +00:00
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
int dsi_panel_device_register(struct platform_device *ctrl_pdev,
|
|
|
|
struct device_node *pan_node, struct mdss_dsi_ctrl_pdata *ctrl_pdata)
|
|
|
|
{
|
|
|
|
struct mipi_panel_info *mipi;
|
2015-05-25 09:12:07 +00:00
|
|
|
int rc, data;
|
2015-05-06 07:39:44 +00:00
|
|
|
struct dsi_shared_data *sdata;
|
2015-04-23 03:14:49 +00:00
|
|
|
struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
|
|
|
|
struct resource *res;
|
2015-05-06 05:45:30 +00:00
|
|
|
struct device_node *fb_node;
|
|
|
|
struct platform_device *dsi_dev;
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
mipi = &(pinfo->mipi);
|
|
|
|
|
|
|
|
pinfo->type =
|
|
|
|
((mipi->mode == DSI_VIDEO_MODE)
|
|
|
|
? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL);
|
|
|
|
|
|
|
|
rc = mdss_dsi_clk_div_config(pinfo, mipi->frame_rate);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: unable to initialize the clk dividers\n", __func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = mdss_dsi_get_dt_vreg_data(&ctrl_pdev->dev, pan_node,
|
2015-05-06 07:39:44 +00:00
|
|
|
&ctrl_pdata->panel_power_data, DSI_PANEL_PM);
|
2015-04-23 03:14:49 +00:00
|
|
|
if (rc) {
|
|
|
|
DEV_ERR("%s: '%s' get_dt_vreg_data failed.rc=%d\n",
|
|
|
|
__func__, __mdss_dsi_pm_name(DSI_PANEL_PM), rc);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
rc = msm_dss_config_vreg(&ctrl_pdev->dev,
|
|
|
|
ctrl_pdata->panel_power_data.vreg_config,
|
|
|
|
ctrl_pdata->panel_power_data.num_vreg, 1);
|
2015-04-23 03:14:49 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: failed to init regulator, rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = mdss_dsi_parse_ctrl_params(ctrl_pdev, pan_node, ctrl_pdata);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: failed to parse ctrl settings, rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
pinfo->panel_max_fps = mdss_panel_get_framerate(pinfo);
|
|
|
|
pinfo->panel_max_vtotal = mdss_panel_get_vtotal(pinfo);
|
|
|
|
|
|
|
|
rc = mdss_dsi_parse_gpio_params(ctrl_pdev, ctrl_pdata);
|
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: failed to parse gpio params, rc=%d\n",
|
|
|
|
__func__, rc);
|
|
|
|
return rc;
|
|
|
|
}
|
2014-10-21 18:16:37 +00:00
|
|
|
|
2015-05-06 07:39:44 +00:00
|
|
|
if (mdss_dsi_link_clk_init(ctrl_pdev, ctrl_pdata)) {
|
2012-12-14 06:49:58 +00:00
|
|
|
pr_err("%s: unable to initialize Dsi ctrl clks\n", __func__);
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
2015-03-13 22:21:19 +00:00
|
|
|
if (pinfo->dynamic_fps)
|
|
|
|
if (mdss_dsi_shadow_clk_init(ctrl_pdev, ctrl_pdata))
|
2014-08-19 16:33:30 +00:00
|
|
|
pr_err("unable to initialize shadow ctrl clks\n");
|
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
if (mdss_dsi_retrieve_ctrl_resources(ctrl_pdev,
|
2013-07-31 01:47:33 +00:00
|
|
|
pinfo->pdest,
|
2013-03-26 21:10:40 +00:00
|
|
|
ctrl_pdata)) {
|
2012-12-14 06:49:58 +00:00
|
|
|
pr_err("%s: unable to get Dsi controller res\n", __func__);
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
2014-09-05 05:58:32 +00:00
|
|
|
ctrl_pdata->panel_data.event_handler = mdss_dsi_event_handler;
|
|
|
|
|
|
|
|
if (ctrl_pdata->status_mode == ESD_REG ||
|
2017-04-18 01:29:57 +00:00
|
|
|
#if !defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
2014-09-05 05:58:32 +00:00
|
|
|
ctrl_pdata->status_mode == ESD_REG_NT35596)
|
2017-04-18 01:29:57 +00:00
|
|
|
#else
|
|
|
|
ctrl_pdata->status_mode == ESD_REG_NT35596 ||
|
|
|
|
ctrl_pdata->status_mode == ESD_REG_IRQ)
|
|
|
|
#endif
|
2014-09-05 05:58:32 +00:00
|
|
|
ctrl_pdata->check_status = mdss_dsi_reg_status_check;
|
|
|
|
else if (ctrl_pdata->status_mode == ESD_BTA)
|
|
|
|
ctrl_pdata->check_status = mdss_dsi_bta_status_check;
|
|
|
|
|
|
|
|
if (ctrl_pdata->status_mode == ESD_MAX) {
|
|
|
|
pr_err("%s: Using default BTA for ESD check\n", __func__);
|
|
|
|
ctrl_pdata->check_status = mdss_dsi_bta_status_check;
|
|
|
|
}
|
|
|
|
if (ctrl_pdata->bklt_ctrl == BL_PWM)
|
|
|
|
mdss_dsi_panel_pwm_cfg(ctrl_pdata);
|
|
|
|
|
|
|
|
mdss_dsi_ctrl_init(&ctrl_pdev->dev, ctrl_pdata);
|
|
|
|
|
2014-07-29 18:02:10 +00:00
|
|
|
ctrl_pdata->dsi_irq_line = of_property_read_bool(
|
|
|
|
ctrl_pdev->dev.of_node, "qcom,dsi-irq-line");
|
|
|
|
|
|
|
|
if (ctrl_pdata->dsi_irq_line) {
|
|
|
|
/* DSI has it's own irq line */
|
|
|
|
res = platform_get_resource(ctrl_pdev, IORESOURCE_IRQ, 0);
|
|
|
|
if (!res || res->start == 0) {
|
|
|
|
pr_err("%s:%d unable to get the MDSS irq resources\n",
|
|
|
|
__func__, __LINE__);
|
2014-10-02 18:13:50 +00:00
|
|
|
return -ENODEV;
|
2014-07-29 18:02:10 +00:00
|
|
|
}
|
2014-09-05 05:58:32 +00:00
|
|
|
rc = mdss_dsi_irq_init(&ctrl_pdev->dev, res->start, ctrl_pdata);
|
2014-07-29 18:02:10 +00:00
|
|
|
if (rc) {
|
|
|
|
dev_err(&ctrl_pdev->dev, "%s: failed to init irq\n",
|
|
|
|
__func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-08-27 20:18:08 +00:00
|
|
|
ctrl_pdata->pclk_rate = mipi->dsi_pclk_rate;
|
2013-07-31 01:47:33 +00:00
|
|
|
ctrl_pdata->byte_clk_rate = pinfo->clk_rate / 8;
|
2013-05-06 23:10:03 +00:00
|
|
|
pr_debug("%s: pclk=%d, bclk=%d\n", __func__,
|
|
|
|
ctrl_pdata->pclk_rate, ctrl_pdata->byte_clk_rate);
|
|
|
|
|
2013-04-23 19:24:05 +00:00
|
|
|
ctrl_pdata->ctrl_state = CTRL_STATE_UNKNOWN;
|
2013-02-01 03:36:15 +00:00
|
|
|
|
2014-09-18 10:43:58 +00:00
|
|
|
/*
|
|
|
|
* If ULPS during suspend is enabled, add an extra vote for the
|
|
|
|
* DSI CTRL power module. This keeps the regulator always enabled.
|
|
|
|
* This is needed for the DSI PHY to maintain ULPS state during
|
|
|
|
* suspend also.
|
|
|
|
*/
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata = ctrl_pdata->shared_data;
|
|
|
|
|
2014-09-18 10:43:58 +00:00
|
|
|
if (pinfo->ulps_suspend_enabled) {
|
|
|
|
rc = msm_dss_enable_vreg(
|
2015-05-06 07:39:44 +00:00
|
|
|
sdata->power_data[DSI_PHY_PM].vreg_config,
|
|
|
|
sdata->power_data[DSI_PHY_PM].num_vreg, 1);
|
2014-09-18 10:43:58 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: failed to enable vregs for DSI_CTRL_PM\n",
|
|
|
|
__func__);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-07-07 15:27:52 +00:00
|
|
|
pinfo->cont_splash_enabled =
|
|
|
|
ctrl_pdata->mdss_util->panel_intf_status(pinfo->pdest,
|
|
|
|
MDSS_PANEL_INTF_DSI) ? true : false;
|
|
|
|
|
|
|
|
pr_info("%s: Continuous splash %s\n", __func__,
|
|
|
|
pinfo->cont_splash_enabled ? "enabled" : "disabled");
|
|
|
|
|
2013-09-11 01:54:24 +00:00
|
|
|
if (pinfo->cont_splash_enabled) {
|
2014-07-29 06:24:46 +00:00
|
|
|
rc = mdss_dsi_panel_power_ctrl(&(ctrl_pdata->panel_data),
|
|
|
|
MDSS_PANEL_POWER_ON);
|
2013-05-13 20:04:09 +00:00
|
|
|
if (rc) {
|
|
|
|
pr_err("%s: Panel power on failed\n", __func__);
|
|
|
|
return rc;
|
|
|
|
}
|
2015-02-17 11:12:36 +00:00
|
|
|
if (ctrl_pdata->bklt_ctrl == BL_PWM)
|
|
|
|
ctrl_pdata->pwm_enabled = 1;
|
2015-10-20 11:09:28 +00:00
|
|
|
ctrl_pdata->ctrl_state |= (CTRL_STATE_PANEL_INIT |
|
|
|
|
CTRL_STATE_MDP_ACTIVE | CTRL_STATE_DSI_ACTIVE);
|
2014-03-12 20:34:50 +00:00
|
|
|
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
|
2015-05-02 04:32:35 +00:00
|
|
|
ctrl_pdata->is_phyreg_enabled = 1;
|
2015-05-25 09:12:07 +00:00
|
|
|
mdss_dsi_get_hw_revision(ctrl_pdata);
|
2015-08-24 15:43:21 +00:00
|
|
|
mdss_dsi_get_phy_revision(ctrl_pdata);
|
2015-05-25 09:12:07 +00:00
|
|
|
if ((ctrl_pdata->shared_data->hw_rev >= MDSS_DSI_HW_REV_103)
|
|
|
|
&& (pinfo->type == MIPI_CMD_PANEL)) {
|
|
|
|
data = MIPI_INP(ctrl_pdata->ctrl_base + 0x1b8);
|
|
|
|
if (data & BIT(16))
|
|
|
|
ctrl_pdata->burst_mode_enabled = true;
|
|
|
|
}
|
2013-09-11 01:54:24 +00:00
|
|
|
} else {
|
2014-07-29 06:24:46 +00:00
|
|
|
pinfo->panel_power_state = MDSS_PANEL_POWER_OFF;
|
2013-05-06 23:10:03 +00:00
|
|
|
}
|
2013-02-01 03:36:15 +00:00
|
|
|
|
2015-05-06 05:45:30 +00:00
|
|
|
dsi_dev = of_find_device_by_node(ctrl_pdev->dev.of_node->parent);
|
|
|
|
if (!dsi_dev) {
|
|
|
|
pr_err("Unable to find dsi master device: %s\n",
|
|
|
|
ctrl_pdev->dev.of_node->full_name);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
fb_node = of_parse_phandle(dsi_dev->dev.of_node,
|
|
|
|
__mdss_dsi_get_fb_name(ctrl_pdata), 0);
|
|
|
|
if (!fb_node) {
|
|
|
|
pr_err("Unable to find fb node for device: %s\n",
|
|
|
|
ctrl_pdev->name);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data), fb_node);
|
2012-04-24 03:39:17 +00:00
|
|
|
if (rc) {
|
2013-06-20 00:37:50 +00:00
|
|
|
pr_err("%s: unable to register MIPI DSI panel\n", __func__);
|
2012-04-24 03:39:17 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2013-07-31 01:47:33 +00:00
|
|
|
if (pinfo->pdest == DISPLAY_1) {
|
2014-12-15 00:19:54 +00:00
|
|
|
mdss_debug_register_io("dsi0_ctrl", &ctrl_pdata->ctrl_io, NULL);
|
|
|
|
mdss_debug_register_io("dsi0_phy", &ctrl_pdata->phy_io, NULL);
|
2014-11-26 23:38:10 +00:00
|
|
|
mdss_debug_register_io("dsi0_phy_regulator",
|
2015-05-02 04:32:35 +00:00
|
|
|
&ctrl_pdata->phy_regulator_io, NULL);
|
2013-03-26 21:10:40 +00:00
|
|
|
ctrl_pdata->ndx = 0;
|
|
|
|
} else {
|
2014-12-15 00:19:54 +00:00
|
|
|
mdss_debug_register_io("dsi1_ctrl", &ctrl_pdata->ctrl_io, NULL);
|
|
|
|
mdss_debug_register_io("dsi1_phy", &ctrl_pdata->phy_io, NULL);
|
2014-11-26 23:38:10 +00:00
|
|
|
mdss_debug_register_io("dsi1_phy_regulator",
|
2015-05-02 04:32:35 +00:00
|
|
|
&ctrl_pdata->phy_regulator_io, NULL);
|
2013-03-26 21:10:40 +00:00
|
|
|
ctrl_pdata->ndx = 1;
|
|
|
|
}
|
|
|
|
|
2014-12-29 08:45:51 +00:00
|
|
|
panel_debug_register_base("panel",
|
|
|
|
ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
|
|
|
|
|
2017-04-18 01:29:57 +00:00
|
|
|
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
|
|
|
|
/*
|
|
|
|
* Below function shold be executed after mdss_dsi_ctrl_init().
|
|
|
|
* mdss_dsi_ctrl_init() gets DSI ctrl handle number(DSI_CTRL_0, DSI_CTRL_1).
|
|
|
|
*/
|
|
|
|
mdss_samsung_panel_init(pan_node, ctrl_pdata);
|
|
|
|
mdss_samsung_panel_parse_dt(pan_node, ctrl_pdata);
|
|
|
|
pinfo->panel_state = false;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
pr_info("%s: Panel data initialized\n", __func__);
|
2012-04-24 03:39:17 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
static const struct of_device_id mdss_dsi_dt_match[] = {
|
|
|
|
{.compatible = "qcom,mdss-dsi"},
|
2012-04-24 03:39:17 +00:00
|
|
|
{}
|
|
|
|
};
|
2015-04-23 03:14:49 +00:00
|
|
|
MODULE_DEVICE_TABLE(of, mdss_dsi_dt_match);
|
|
|
|
|
|
|
|
static struct platform_driver mdss_dsi_driver = {
|
|
|
|
.probe = mdss_dsi_probe,
|
|
|
|
.remove = mdss_dsi_remove,
|
|
|
|
.shutdown = NULL,
|
|
|
|
.driver = {
|
|
|
|
.name = "mdss_dsi",
|
|
|
|
.of_match_table = mdss_dsi_dt_match,
|
|
|
|
},
|
|
|
|
};
|
2012-04-24 03:39:17 +00:00
|
|
|
|
2012-12-14 06:49:58 +00:00
|
|
|
static struct platform_driver mdss_dsi_ctrl_driver = {
|
|
|
|
.probe = mdss_dsi_ctrl_probe,
|
|
|
|
.remove = mdss_dsi_ctrl_remove,
|
2012-04-24 03:39:17 +00:00
|
|
|
.shutdown = NULL,
|
|
|
|
.driver = {
|
2012-12-14 06:49:58 +00:00
|
|
|
.name = "mdss_dsi_ctrl",
|
|
|
|
.of_match_table = mdss_dsi_ctrl_dt_match,
|
2012-04-24 03:39:17 +00:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int mdss_dsi_register_driver(void)
|
|
|
|
{
|
2015-04-23 03:14:49 +00:00
|
|
|
return platform_driver_register(&mdss_dsi_driver);
|
2012-04-24 03:39:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int __init mdss_dsi_driver_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = mdss_dsi_register_driver();
|
|
|
|
if (ret) {
|
|
|
|
pr_err("mdss_dsi_register_driver() failed!\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
module_init(mdss_dsi_driver_init);
|
|
|
|
|
2015-04-23 03:14:49 +00:00
|
|
|
|
|
|
|
static int mdss_dsi_ctrl_register_driver(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&mdss_dsi_ctrl_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init mdss_dsi_ctrl_driver_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = mdss_dsi_ctrl_register_driver();
|
|
|
|
if (ret) {
|
|
|
|
pr_err("mdss_dsi_ctrl_register_driver() failed!\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
module_init(mdss_dsi_ctrl_driver_init);
|
|
|
|
|
2012-04-24 03:39:17 +00:00
|
|
|
static void __exit mdss_dsi_driver_cleanup(void)
|
|
|
|
{
|
2012-12-14 06:49:58 +00:00
|
|
|
platform_driver_unregister(&mdss_dsi_ctrl_driver);
|
2012-04-24 03:39:17 +00:00
|
|
|
}
|
|
|
|
module_exit(mdss_dsi_driver_cleanup);
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
MODULE_DESCRIPTION("DSI controller driver");
|
|
|
|
MODULE_AUTHOR("Chandan Uddaraju <chandanu@codeaurora.org>");
|