On some PMIC parts falling OV(over voltage) threshold for battery_ov
comparator is lower than the VFLT(float) voltage this prevents comparator
to reset causing a battery_ov misfire. Add a workaround to disable
BATT_OV_ECC (battery OV ends charge cycle) feature to prevent charging
termination.
CRs-Fixed: 881292
Change-Id: I845e63916cf686dfdd47fbcfb22ed22764af39a9
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Currently, in OTG overcurrent conditions, OTG is disabled and
enabled in the reset sequence when the number of retries is less
than 5. There is a sleep time of 20 ms between the above sequence.
However, there is a chance that the USBID interrupt for OTG
removal is handled between the OTG disable and enable sequence.
Even though the USB driver notifies the charger to disable OTG,
it will get enabled again because it's already in the OTG reset
sequence for enabling OTG. Fix this race condition by checking
the presence of OTG before enabling it in the OTG reset sequence.
CRs-Fixed: 887852
Change-Id: I9a34f7f8e34edde69c81abc9930a4b36a8c9e66c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently msm-pm driver is printing the enabled clocks during
the system suspend. After introducing the PSCI framework msm-pm
driver is not being used and can not able to know the enabled
clocks during suspend. Call an API to print the clocks from lpm
driver instead msm-pm driver.
e.g:
echo 1 > /d/clk/debug_suspend
Change-Id: I42373c882ce0d94efc7941238bb7ea011138ed63
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Achyuth Sai Vadrav <avadra@codeaurora.org>
On some PMIC parts falling OV(over voltage) threshold for battery_ov
comparator is lower than the VFLT(float) voltage this prevents comparator
to reset causing a battery_ov misfire. Add a workaround to disable
BATT_OV_ECC (battery OV ends charge cycle) feature to prevent charging
termination.
CRs-Fixed: 881292
Change-Id: I845e63916cf686dfdd47fbcfb22ed22764af39a9
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Use this property to determine if HVDCP3 is supported. HVDCP 3.0
is not supported at startup and needs to be enabled from
userspace. The charger is forced to 9V HVDCP 2.0 at all times
if HVDCP 3.0 is not enabled.
While at it remove the DT property 'qcom,enable-hvdcp-9v'.
Change-Id: I193bd959dd9cb5303f375d2720ec59914ef16032
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Incorrect wakeup source was acquired before scheduling iadc gain
compensation. Fix the same.
Change-Id: I439c1c20d71a72ef9ab02fc916fa8c0dae03ea0a
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Currently, MAH_TO_SOC_CONV_REG is read and the data is converted
to half float before dividing it by the learned capacity.
However, it should not be converted like that and should be used
as an unsigned integer instead. Also, before dividing it by the
learned capacity, convert it to MICRO_UNIT so that the floating
point encoding of cc_to_soc coefficient will be proper. Fix it.
CRs-Fixed: 887349
Change-Id: Ibbeca6f2aff24fc68bc8bf931fa03850ca22c3a9
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently the smb1351-charger driver checks for the presence of the
smb1351 chip in the smb1351_parallel_set_chg_present function regardless
of whether or not the primary charger is calling it to notify of
presence or removal. This is incorrect, as the check will always fail
upon removal if the VDDCAP pin on the primary charger falls fast enough
and puts the smb1351 parallel charger in suspend. This causes subsequent
parallel charging enablements to fail to run the setup routines, and
thus fail enabling parallel charger altogether.
Fix this by only checking for smb1351 chip presence upon the primary
charger notifying the driver of presence, and not upon removal.
CRs-Fixed: 877809
Change-Id: Iac226309286f9169963f5bea07648074415cb4d3
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
Currently, the smb1351 driver does not set the same USB100/USB500 mode
polarity when ran in parallel mode. This can cause current limits of
500/900mA to be switched with 100/150mA.
Fix this by setting the same bits the smb1351 does in its normal hw_init
routine.
CRs-Fixed: 877809
Change-Id: I44ae3086fd86e46b15a2c16368fcd5aade771319
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
msm-pm driver calls msm_jtag_save_state() and msm_jtag_restore_state().
However msm-pm driver is going to be deprecated when we move to PSCI
framework. So remove msm_jtag_save_state and msm_jtag_restore_state
from msm-pm, so that jtag driver handles this in common for both PSCI
and non-PSCi targets.
Change-Id: Ie9060b50aa1118b23e71dbc00ba9ca5bd363f48c
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
On certains devices, some of the CPUs within the apps subsystem are not
functional and might be removed from the CPU possible map. To handle this
dynamic list of CPUs, sleep driver shouldn't make any assumptions with
regards to the logical mapping of the CPU.
Remove the assumption on how physical CPUs are mapped onto logical CPUs and
populate create a reference of sleep status driver in the corresponding
CPU phandles. When the sleep status driver is probed, it would probe
iterating the list of possble CPUs.
CRs-fixed: 756327
Change-Id: I3afe8c9afd26000ab08f0e0c2703f2ce9e15f374
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Rebooting to recovery, bootloader and rtc should be treated as
hard reset if PMIC sparse regs are used to store reset reason.
Otherwise it should be set as warm reset to keep compatible with
legacy design. So correct logic of need_warm_reset here.
Change-Id: Ica173cc379df16a28f11bf5da87cb928e73ecdfb
Signed-off-by: Lijuan Gao <lijuang@codeaurora.org>
Add support to detect the damaged battery when the safety-timer expires
by using the coulomb count. This feature is applicable only for PMi8952
V2.0 FG and the future PMi chips.
CRs-Fixed: 866074
Change-Id: I36bbfac5cea741ab64c7ff2bdeb786d907c101f8
Signed-off-by: Chunmei Cai <ccai@codeaurora.org>
When IADC gain compensation is enabled, gain value should
be stored in SRAM register 0x425 as specified in the
documentation. Fix SRAM register address to 0x425 in gain
reset condition.
CRs-Fixed: 886608
Change-Id: I56aa48d3b7e2960fc9f1afd8534d93c34b982114
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
I2C transactions can timeout if the bus is already suspended when the
I2C transaction is initiated. Prevent this by holding the device awake
during I2C transactions.
Note that if the transaction is initiated after suspend_noirq, the
transaction will still timeout, but the I2C retry will ensure the
transction goes through.
CRs-Fixed: 878738
Change-Id: I780a7ddfc7a25f9796dbe19a16c15cee66a2e0ed
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
PMI8950 v2.0 supports coulomb counting in hardware which can
be used for capacity learning. Enable this feature.
CRs-Fixed: 860869
Change-Id: I2450ade3d30683effe92ad1be5c4db735a507b06
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
In the case of internal current sensing IADC gain has dependency
on VBAT during discharge. Add support for gain compensation to
negate the effect of VBAT.
CRs-Fixed: 859531
Change-Id: Ic80b1fb853cad88aae4351abeaf573d37bc1ec54
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
During the parallel charging's taper charge algorithm, hold the device
awake so that I2C transactions do not timeout due to suspend.
CRs-Fixed: 878738
Change-Id: I629e81ff7c4f11c31945208527ceb7aa8a2848ba
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
Prepare step for HVDCP 3.0 detection could fail if the usb charger is
removed and it could leave AICL disabled.
Fix it by ensuring AICL is enabled if prepare fails.
Change-Id: I945cf6d9a7be13f0cb5f934d22fd80bb6866ac03
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
We often see that a newly inserted charger is declared weak charger
because that status is incorrectly carried forward from the previous
charger insertion. This is especially true when usbin_uv interrupt
is triggered before or simultaneously along with src_detect interrupt.
The usbin_uv interrupt sees that the charger is present and it ends
up marking the charger as weak.
Fix this by ensuring the weak charger status is cleared upon a rising
src_detect interrupt too. The driver currently clears it only for the
falling edge case.
CRs-Fixed: 876999
Change-Id: Id370c956c74c3b972216c77718d5978f1dbd213f
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Currently, the return code is checked wrongly to determine the
current_limit for USB chargers. This ends up in drawing only
100mA from SDP as against 500mA. Fix it.
CRs-Fixed: 867835
Change-Id: Ieee991c96e1c1012472c7ea4b6ecbebc8a33f360
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Implement properties to realize authentication and optimization
of hvdcp3 charger.
The steps to prepare include, among other steps:
-disabling HVDCP and APSD
-reducing input current to 500mA
-faking a removal and insertion
The steps to unprepare include, among other steps:
-re-enable HVDCP and APSD.
-reset the input current limit.
-faking a removal and insertion.
Note that if the charger is removed, prepare or pulsing state need to
be reset.
Change-Id: I529e1515274088a3d540e9296681d4e6709654a4
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When usb is inserted, it could take up to 600mS for charger h/w to run
APSD. APSD run involves charger changing the USB DP and DM lines for
charger type detection. Ensure that the usb driver is instructed to keep
the lines floating while this is happening. In other words ensure that
the dp_dm property is always set to DPF_DMF while we are between a falling
usbin_uv and a rising src_detect interrupt.
Note that all use cases are expected to call set_usb_psy_dp_dm() to set
DP_DM property, where the check for usbin_uv and src_detect interrupt is
done. This rule does not apply to usbin_uv interrupt handler where the
interrupt states are known and the property can be set directly.
Change-Id: If61a85c3a1af81707bd9ea227ffb44c5772fc2b1
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When APSD is disabled, PMI registers do not set any bits in the type
register. The driver treats this as an SDP and input current
configurations are written to usb 5/1 mode registers.
For HVDCP 3.0, APSD remains disabled. When input current is configured,
it ends up writing to usb 5/1 related registers instead of high current
mode registers. This essentially causes HVDCP 3.0 to run with incorrect
input current.
Fix this by treating the type as DCP when APSD is disabled. This will
end up configuring the high current mode registers for HVDCP 3.0.
Change-Id: I5d8dff02d46fa0fb5c1fdd5e2ab6777a2e9ce6ca
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Since the charger can detect the USB type it need not wait on usb power
supply (usb psy) to inform how much current to draw from the charger.
Set the charge current to 1.8A if DCP or HVDCP and 1.5A if CDP. For SDP
draw just 100mA and wait for usb driver to negotiate with the host to draw
more current.
Note that APSD is expected to be disabled only when HVDCP detection is
in progress. In such a case the type of the charger reported will be
NONE. The code treats this situation correctly by setting the limit
defined for a wall charger.
Change-Id: I9d2a927450929546aee09ab6e530251cf59d6521
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add debug prints under PR_MISC category to help verify the
communications with usb power supply.
Also take this opportunity to clean up some excessive prints in
the smbchg_external_power_changed function.
Change-Id: I4c3adb8f06ed1734862f4244818c322a8522e0f9
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The ALLOW_DETECTION property is meant to reflect that the power supply
controller should relinquish USB's DP and DM lines and put them in a
floating state.
Change to use the DP_DM property with DPF_DMF values for floating and
DPR_DMR values for removing the float of DP/DM lines.
USB: phy: msm: rename ALLOW_DETECTION prop to DP_DM
Power supply driver has changes the ALLOW_DETECTION property to
use the DP_DM property with DPF_DMF values for floating and
DPR_DMR values for removing the float of DP/DM lines.
Make changes in phy msm driver to handle it accordingly
Change-Id: I1fdfaceb88058a6d1d3f21205a1a9b0e5058e7e7
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Tarun Gupta <tarung@codeaurora.org>
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
HVDCP 3P0 needs a few properties implemented by USB power
supply and battery power supply for correct operation.
Change-Id: Ia69ec459eea72703f530c7124f7cc579f4d4c423
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add the property SAFETY_TIMER_EXPIRED to the power supply
framework in order to support detecting damaged battery.
CRs-Fixed: 866074
Change-Id: Icefb268a0478f7d9718e3167846fb82899fe8780
Signed-off-by: Chunmei Cai <ccai@codeaurora.org>
Currently the parallel charging check code "smbchg_is_parallel_usb_ok"
returns false if the parallel charger has been disabled within the last
30 seconds. The very first time the parallel charger is enabled, this
condition is considered true because the last_disabled timestamp is set
to the boot time.
In the "smbchg_parallel_usb_check_ok" function, parallel charging is
disabled if the "smbchg_is_parallel_usb_ok" returns false. This makes it
so that the first attempt at parallel charging always fails.
Fix this by skipping the last_disabled timestamp check if parallel
charging is already enabled.
CRs-Fixed: 880076
Change-Id: Id7f2798e04da343806a3919e55f52932ef0a0c40
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
The driver currently reschedules vfloat adjustments if the battery
temperature is not good. Rescheduling implies that the driver continues
to hold the wakeup source. Recovery from a battery temperature is
unpredictable and it is best to stop the adjustments and release the
wakeup source.
Once the battery comes in a normal temperature zone, hardware removes
JEITA limitation and software will eventually get a taper charge
interrupt where vfloat adjustments will be retried again.
CRs-Fixed: 878035
Change-Id: I32640b2accb89a16d6e7588da35114d8c3066fcb
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add support for the optional property qcom,hold-soc-while-full. When
this property is defined, the fuel gauge driver will report 100% SoC
whenever the battery is full.
CRs-Fixed: 864029
Change-Id: Ide23402f04e1ed71c4d8d9839522e4198b222e35
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
Add support for JEITA hysteresis and allow it to be configured
through "qcom,cold-hot-jeita-hysteresis" device tree property.
CRs-Fixed: 866616
Signed-off-by: Qiang Huang <qianghuang@codeaurora.org>
Change-Id: I902080978701a1853531496e4afdd85ecf972b0d
Currently, we configure the FG SRAM register 0x4AF only if the
qcom,sw-rbias-control property is specified through device tree.
However, if that property is not specified for a device anymore
where it was specified before, previous configuration would be
retained unless there is a dVdd reset. Reconfigure the register
0x4AF to allow the default thermistor settings in such cases.
CRs-Fixed: 880044
Change-Id: Ic9bbea3d68968c39bf9b66532278178de9104b24
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
CPU suspend is the standard kernel interface to be used to enter
low-power states on ARM32 systems. Current cpu_suspend implementation
by default assumes that all low power states are losing the CPU context,
so the CPU registers must be saved and cleaned to DRAM upon state
entry. Furthermore, the current cpu_suspend() implementation assumes
that if the CPU suspend back-end method returns when called, this has
to be considered an error regardless of the return code (which can be
successful) since the CPU was not expected to return from a code path
that is different from cpu_resume code path - eg returning from the reset
vector.
All in all this means that the current API does not cope well with
low-power states that preserve the CPU context when entered
(ie retention states), since first of all the context is saved for nothing
on state entry for those states and a successful state entry can return as
a normal function return, which is considered an error by the current CPU
suspend implementation.
This patch refactors the cpu_suspend() API so that it can be split in
two separate functionalities. The arm32 cpu_suspend API just provides
a wrapper around CPU suspend operation hook. A new function is
introduced (for architecture code use only) for states that require
context saving upon entry:
__cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
__cpu_suspend() saves the context on function entry and calls the
so called suspend finisher (ie fn) to complete the suspend operation.
The finisher is not expected to return, unless it fails in which case
the error is propagated back to the __cpu_suspend caller.
The API refactoring results in the following pseudo code call sequence
for a suspending CPU, when triggered from a kernel subsystem:
/*
* int cpu_suspend(unsigned long idx)
* @idx: idle state index
*/
{
-> cpu_suspend(idx)
|---> CPU operations suspend hook called, if present
|--> if (retention_state)
|--> direct suspend back-end call (eg PSCI suspend)
else
|--> __cpu_suspend(idx, &back_end_finisher);
}
By refactoring the cpu_suspend API this way, the CPU operations back-end
has a chance to detect whether idle states require state saving or not and
can call the required suspend operations accordingly either through simple
function call or indirectly through __cpu_suspend() which carries out
state saving and suspend finisher dispatching to complete idle state entry.
Change-Id: I02567729f882fb7c8e1f9ba054c55aeb8be4c31c
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
With PSCI cpu_suspend API is refactored to support
retention modes. This breaks the existing cpu_suspend
call from msm-pm for Non-PSCI targets.
Update msm-pm to use correct cpu_suspend call for
Non-PSCI targets for both ARM32 and ARM64 systems.
Change-Id: Ib4145699bf8687ff9fb2afb02b0f3f257d059ffb
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
When capacity learning feedback is enabled, cc_to_soc
coefficient should get stored in SRAM register 0x578
as specified in the documentation. Fix it.
CRs-Fixed: 870383
Change-Id: Icd8e2770d7060e99388c845e991a2555bff4ba4d
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Previously, a single wakeup source is used across the driver for
multiple clients. If two or more clients held the wakeup source
and one client want to relax, it will be relaxed unintentionally
for other clients.
Manage the wakeup source status by using a global bitmap variable.
Each bit maps to one client, each client calling will update the
bitmap variable, and the wakeup source can only be relaxed if
all of the client has relaxed it intentionally.
CRs-Fixed: 846212
Change-Id: I8f93f19a8c639c8cde0b8798cc68e148d56b045e
Signed-off-by: Qiang Huang <qianghuang@codeaurora.org>
Bucket based cycle counter implementation allows user-space
to set the bucket-id and read counter associated with the bucket.
There is a possibility of setting bucket-id beyond maximum bucket
count resulting in out of bound array access.
Fix this by adding check to reject bucket-id if it is greater than
maximum bucket size.
CRs-Fixed: 847140
Change-Id: I9c0e9a7687fa3e765fe15a98176177d12a92b33d
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Currently the fuel gauge driver only allows resume SOCs of 0-100.
However, the fuel gauge hardware allows for higher accuracy resume SOCs
of 0-255. Support this in the driver by adding the resume-soc-raw
property.
Also, fine tune the reported SOC. 0% SOC should only be reported when
the SOC is 0, and 100% SOC should only be reported when the SOC is full.
Change the report function to reflect this.
CRs-Fixed: 857620, 844543
Change-Id: Ib7513bf5c53c94cbb655eb0934472e912bc3f805
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
During battery-hot conditions on PMI8950 v2.0 the IUSB=100mA
drops to 0mA. Fix this by forcing 150mA instead of 100mA.
CRs-Fixed: 865824
Change-Id: Ibb3b11310baa45235f5c9837d2a10ce6917e80f8
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The charger pulse skip mode can cause drastic dips on VBUS when OTG is
enabled. This dip can cause a glitch in the fuel gauge and lock up the
entire peripheral.
Disable the pulse skip mode before enabling OTG and only reenable it after
OTG is disabled.
CRs-Fixed: 862602
Change-Id: Ifb0df393db4a03020a5753aa5d92dfa796e3bd86
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
Battery voltage (VBat) is not limited correctly when JEITA is active
due to float voltage (VFloat) trimming. Disable VFloat adjustments
while JEITA is active.
CRs-Fixed: 860551
Change-Id: I32389bb82fe2ee5e99edc80c90eac725eb26705b
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently, cycle counter gets incremented only when the charging
happens within the specified low and high soc thresholds. Instead
of that, implement the bucket based cycle counter algorithm which
increments the counters based on multiple charging buckets. This
helps to study the charging pattern.
For example, with a bucket count of 8, if the user charges from 5
to 30% and removes the charger, cycle counter for buckets 1 and 2
would get incremented. This bucket based cycle counters will be
available to the userspace via cycle_count property after the
cycle_count_id property is set to specify which bucket needs to
be read.
For example, to read cycle count for bucket 4, following helps.
echo 4 > /sys/class/power_supply/bms/cycle_count_id
cat /sys/class/power_supply/bms/cycle_count
Since this algorithm operates on all the SOC levels (0-100%),
there is no need for low and high SOC thresolds. Remove them.
CRs-Fixed: 847140
Change-Id: I1c0840f01693909586cafb3d51685637f3a6d2ba
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
To support the bucket based cycle counters, we need a property
to specify the id of the cycle counter. For e.g. if the cycle
count for bucket 4 needs to be read, then the user need to
set cycle_count_id before reading the cycle_count property.
Add support for that via CYCLE_COUNT_ID property.
CRs-Fixed: 847140
Change-Id: I53d8b90d330da64b26b6a674f1d7c2c6649e4eb5
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, FG SRAM parameters are updated once every 30 seconds.
However, there are cases where the user wants to see the SRAM
parameters getting updated as soon as the charging status
changes e.g. from charging to discharging. Update the SRAM
parameters if the status changes and the last update of SRAM
parameters was done 5 seconds before.
While at it, remove the prev_status defined under learning data
as it is not used at all.
CRs-Fixed: 860061
Change-Id: Id5b97a29cf7d67a317d71726a126060852fba913
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
The bias current is identified only by the lower two bits, and its
value can be 1, 2, or 3. The current bounds check is incorrect. Fix
it.
CRs-Fixed: 857879
Change-Id: Icf34d1144904b9d41f5181625dcf598c247e33d3
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
SCHG_LITE supports a hardware hiccup mode where the charger
hardware retries enabling OTG 3 times during an OC (over-current) event.
Enable the hiccup mode for SCHG_LITE and do not retry OTG enable/disable
in software. If the OC event still occurs then it indicates a true
shot-circuit and the user is expected to re-insert the OTG cable for
OTG to be re-enabled.
CRs-Fixed: 860762
Change-Id: I51f51492193bc08edf87efde46f58c9db902ed71
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Capacity learning feedback is needed for the capacity learning
algorithm. It will be supported based on the following device
tree property "qcom,capacity-learning-feedback" and will work
only when the capacity learning is enabled.
CRs-Fixed: 848838
Change-Id: Idde0d3aa6e8a3aafeadf5f90e2118ceed2c96b5f
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
8 pairs of OTP backup registers (from 0xE0 to 0xEF) are provided
in SMB1360 chip to override OTP register values. Add a mechanism
to manage the limited OTP backup registers' usage allocation.
The OTP back up registers could be allocated with pairs and the
total usage allocation count can't exceed the total amount
-- 8 pairs.
CRs-Fixed: 846212
Change-Id: Idd5abba360e35fc4864c9ce9daeab4c2d5555f30
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Signed-off-by: Qiang Huang <qianghuang@codeaurora.org>
Currently, the battery charging enable/disable logic for unknown and
loading batteries is incorrect. The current implementation will always
charge loading batteries and never charge if qcom,charge-unknown-battery
is defined.
Fix this by correcting the conditional check in check_battery_type.
CRs-Fixed: 861687
Change-Id: I427816a33b2bc44a573f03edc81045bfcc28e41f
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
There is a possibility that a scheduled vdd_trim alarm work
may fire after USB removal. Fix this by cancelling the alarm
when USB is removed.
CRs-Fixed: 847664
Change-Id: Ia9dd27c6b0715ce78d6467c6ffe877f2ef0e9355
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>dd
Add support to read thermal coefficients from battery profile.
If thermal coefficient is present in FG DT node then it will always
takes precedence over the configuration present in battery profile.
CRs-Fixed: 853464
Change-Id: Iea876b9d4f7777028d0aed5a79ff3d5dada1f8b6
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Add a workaround (WA) flag variable to enable/disable
WA's across PMIC versions/revisions.
Implement the below changes for PMI8950 2.0
- Disable the aicl de-glitch WA for PMI8950 2.0 and above
- DT property to enable HVDCP 2.0 9V support
CRs-Fixed: 855103
Change-Id: Ia5c3ba9adbdc9c43adf55d6637b8d8ac6e517d57
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Add an additional check to the capacity learning algorithm's start
conditions to make sure that the battery is reasonably well settled
before starting. Specifically, check that the difference between
vbat_shadow and the v_current_predicted is not greater than a specified
threshold before starting the algorithm.
CRs-Fixed: 827068
Change-Id: Ief96061c69d26c8ebbf4cf374c3e0f7ef5933017
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
Currently the fuel gauge driver only reads CPRED_VOLTAGE until the
battery profile is loaded. This is incorrect, as this value is also used
by the driver to report to userspace. Change the conditional check on
the SRAM parameter enums so that the update_sram function always read
CPRED_VOLTAGE whenever the sram is being refreshed.
CRs-Fixed: 827068
Change-Id: I2f951c40d40bf95b95cda883b3378e764f6b5baf
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
With ov-ends-charge-cycle enabled, if soft JEITA kicks in
and battery voltage higher than compensated float voltage,
the battery OV(over voltage) interrupt will be triggered and
charging will be stopped. After battery temperature falls
back to normal range, charging won't be resumed automatically
until charging disabled/enabled once.
Add the interface to disable ov-ends-charge-cycle, to fix
charging can not resume issue.
CRs-Fixed: 854879
Change-Id: I07abe0b25f4d389154afaa83495e2c42d37c5029
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
There are hardware platforms where the ID line is left open. Skip
reading the line's status for them.
CRs-Fixed: 822369
Change-Id: I243636479c904ba3905bb3f924f02418d5ac93b2
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Charger driver reports battery FULL status based on the
BAT_TCC_REACHED_RT_STS bit, there is a possibility of
this bit remaining set even after removal of charger
resulting in reporting of FULL status with no input present.
Fix this by reporting DISCHARGING if no input is present
before checking for BAT_TCC_REACHED_RT_STS bit.
CRs-Fixed: 851399
Change-Id: Ice43e758e0ecf31ac0ec3ccff0578a4558b77b31
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
smbchg_get_aicl_level_ma function can never report AICL_SUSPEND
status as the status bit is reset before AICL_SUSPEND check.
Fix this by checking AICL_SUSPEND bit status before resetting the
bit.
CRs-Fixed: 851902
Change-Id: I8bb9bf60ab13a0665ce4e178ebf25d6d384b9d7a
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Commit abc7110316 (power:
qpnp-smbcharger: Fix uninitialized access to dc_psy) tried
fixing an uninitialized access to dc_psy. However, there is
a race condition where dc_psy_type can get set just after
reading from device tree node but the dc_psy itself was not
registered at all.
This ends up in a system crash when the driver tries to call
power_supply_changed of dc_psy when it's not even registered.
Fix this by checking whether the dc_psy is registered before
calling power_supply_changed.
CRs-Fixed: 852821
Change-Id: Ic5f032107e0f5f1190b335e9d5de3e5497fd1e3c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
The current driver indicates usb removal on a USB OV event.
There is also a need to notify usb insertion when charger
voltage back to normal.
In the meantime, fix a bug for the conflict between USB OV
interrupt and source detect interrupt by adding a USB OV check
in source detect interrupt handler.
Change-Id: I3ef881552cfe610cace1ed438a7b85f06cacc11f
CRs-Fixed: 841380
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
The SMB1351 will enable the HVDCP 2.1 by default. A new property
"force-hvdcp-2p0" allows to force the HVDCP working on the 2.0 mode.
The HVDCP 2.1 algorithm must be disabled if forcing on the 2.0 mode.
Change-Id: I4b0b24ff0d9969ca3bdf0887e07142d5c1f01b83
Signed-off-by: Jie Cheng <rockiec@codeaurora.org>
commit
defce2137d53df0687d76c4c34c88b8b93305563:
power: qpnp-smbcharger: do not override APSD results
changes to disable ICL override.
If usb charger type is CDP, since ICL override is disabled, PMI defaults
to drawing 1500mA.
In thermal situations the driver may be asked to draw less current from
CDP. Use ICL override to configure a different input current limit for
CDP. Reset it back when the CDP is removed.
This also necessitates to read charger type in the current setting
function. Since we know the type optimize that function to set only the
necessary registers for that type. Earlier we used to update registers
for all the types.
CRs-Fixed: 847362
Change-Id: Ibda507391da5acfeac81cc40d5cabc779cbc077c
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Make sure that any SOC change in suspend is reported
immediately on resume.
CRs-Fixed: 849914
Change-Id: Ib1432a30e92c7b332ed74a061d61c1e983d3ffbb
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Add ftrace events in bcl driver for frequency and
hotplug mitigations.
Change-Id: I76a968f8b752c66c06a7af8b517d22a32cf6eeda
Signed-off-by: Shiju Mathew <shijum@codeaurora.org>
Add support to read CC-CV threshold configuration from battery profile.
If CC-CV threshold is present in FG DT node then it will always takes
precedence over the configuration present in battery profile.
CRs-Fixed: 847161
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Change-Id: I40562f50247b4674726a7ac6364b8b91d7440309
Add support to read fast charge current configuration from battery profile.
If fast charge configuration is present in charger DT node then it will
always takes precedence over the configuration present in battery profile.
CRs-Fixed: 847161
Change-Id: If40f91997c46358ba176fd0531a0d5638ee39157
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
When the charging is ended, the last_soc may be set to invalid for
a while. Add a check and do not calculate the reported soc if the
last_soc value is invalid.
Change-Id: Ia6987098dee5447c6852a276491930ddfbaa062e
CRs-Fixed: 848209
Signed-off-by: Jie Cheng <rockiec@codeaurora.org>
In case of Interleave Memory Access(IMA) protocol, software
needs to wait and poll for IACS Ready bit to be set across
each read/write operation.
FG hardware updates IACS bit 20-30 usec after the read/write
operation. Add a delay of 30 usec before reading IACS bit to
make sure FG hardware gets time to update (this reduces number
of polling retries and overall read/write time).
Change-Id: I4866c82f30d9271fa8bead09d26ec7eaba6f1f2b
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Specific delay is needed after SMB1360 power on, FG reset, or waiting for
FG memory access being granted. These time consuming operations in the
driver probe() function will slow down the kernel initial process and
result a long boot up time.
Move time consuming initialization into a delay worker, and replace the
FG memory access granted status polling by using the FG access granted
interrupt.
CRs-Fixed: 829505
Change-Id: I8f3dccbf40d111f82fa63650c2cc1f26a090665c
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
This patch will do BCL core mitigation via KTM device
manager interface. This will reduce core mitigation
contention between KTM and BCL.
Change-Id: Ie4bb85c1ea91120d1de4618f214bdc24724e5e7a
Signed-off-by: Shiju Mathew <shijum@codeaurora.org>
While configuring SMB1357 charger for parallel operation do a dummy read of
the SMB1357 version register to check if it is present.
Change-Id: Id99779bbe6984d9be485c016f8993eff396ae793
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
While configuring SMB1351 for parallel operation do a dummy read of
the SMB1351 version register to check if it is present.
Change-Id: Ib5f5646a40f8f595238ffb8f79a2b27b468cfc8d
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The parallel charging configuration is being applied without
checking if a parallel-charger is actually present. Fix
this by checking its presence before configuring it.
Change-Id: Iffd1c22922c75bd4ea3feaabf33f727df852c984
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
This is reverting three commits
1. 3873a6ebce
power: qpnp-smbcharger: turn off USB APSD reruns by default
2. 228bf87efa
power: qpnp-smbcharger: fix race condition in APSD rerun
3. ac23fdc07d
power: qpnp-smbcharger: fix usb type detection
An alternative scheme where the USB PHY is guaranteed to remove the
pulls on D+/D- is implemented in the previous commits.
This obviates the need of rerun APSD. Remove it.
Change-Id: Icadda183727e1426ca7b693a8fb1b6c75b8e8399
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The current driver uses rerun APSD to detect the proper charger type
if SDP is reported. The pull downs on D+/D- by USB PHY causes any charger
type to be reported as SDP and in rerun APSD trick the detection is made
to run after USB PHY has been notified to remove its pull downs.
This works great except for when the charger is really an SDP. Rerunning
APSD is an expensive operation timewise - it takes 1 second to do it.
To confirm an SDP is plugged in , APSD is run twice. That exceeds the time
limits mentioned in the spec for SDP detection.
Fix this by utilizing the usbin_uv falling edge interrupt to notify the
USB PHY to remove the pulls. The USBIN_UV interrupt is raised within 20mS
of USB insertion. APSD is configured to run 600mS after USB insertion.
That gives the interrupt thread 600-20 = 580mS to notify USB PHY.
580mS is plenty time to notify the USB PHY and for it to remove the pull
down. However, that may not be the case if the device is resuming from
suspend state. Mark the USBIN UV interrupt EARLY to handle this.
Change-Id: I6ec512f1f3f6680702cd532b32f0b75c6cf4d6f0
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
In cases with long USB cable, high system load and high battery voltage,
charger may easily collapse and this may cause UV interrupt fired.
To avoid this scenario, using source detect for all charger removal,
including DCP/HVDCP.
As source detect interrupt is not triggered on falling edge, we need
a flexible solution. Using charger UV interrupt and schedule a work
to check source detect status. As SMB system team suggested, have checked
twice to ensure the status is correct.
CRs-Fixed: 838491
Change-Id: Ia2615517758818eed0cc1ded35113a8587c8213f
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
Commit 387cacdfdc (power:
qpnp-smbcharger: always set high current when setting ICL)
tried fixing a problem where the APSD results couldn't be
overridden when setting lower currents like 500/900 mA.
However, it broke a special case handling the suspend current
configuration. Fix it.
CRs-Fixed: 844200
Change-Id: I02ff84d1e17ca6d714aed99c41c0399afefb71cc
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Commit c430141935 ("power:
qpnp-fg: reduce the probe time of driver) moved the hardware
initialization to delayed_init_work to improve the driver probe
time. However, with the recent change made in update_sram_data
to wait for SRAM access to be revoked before updating SRAM
parameters times out because the access is held by the callee
itself.
This eventually causes error in fg_batt_profile_init as below.
[ 9.547366] FG: fg_hw_init: set default value to esr filter
[ 12.542896] FG: update_sram_data_work: transaction timed out ret=0
[ 17.539999] FG: fg_batt_profile_init: profile loading timed out rc=-110
[ 17.545583] FG: batt_profile_init: failed to initialize profile
Fix this.
CRs-Fixed: 844197
Change-Id: I16f52f991ccccc275a945874bfe86259a5ec97f1
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently battery missing interrupt is handled in an interrupt
handler. There are some situations where it can sleep. Hence
move it to a threaded interrupt handler to handle that.
While at it, fix the error return code handling when the
interrupt registration fails.
CRs-Fixed: 837984
Change-Id: I5a79f24d809809cbef7b8b93e9942b72b1bfc335
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
The default charger LED configuration is blink pattern '1'.
In case of software controlled charger LED configuration
the LED will start blinking unless userspace turns it off.
Initialize LED configuration as 'off' in case of software
controlled configuration.
CRs-Fixed: 840829
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Change-Id: I7cc36e64ca3bdefccb37d206bfdc16c37da2614d
Most of the platforms have D+/D- lines routed to USB PHY and the
charger. And almost all the PHYs pull down the D+/D- lines unless
it is set to active mode. This grounding causes issues with
source detection and results in detecting SDP even when it is not.
Fix this by setting ALLOW_DETECTION property to inform the PHY to
remove the pull downs. Once done, rerun APSD and inform of the correct
results via the TYPE and PRESENT property.
The reruns are necessary only if an SDP is detected.
By the way, prevent running APSD when battery is missing. It prevents
brownout.
Change-Id: I472ee8b7fc9673910af206e37dd55b2d1a3fce5d
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
When APSD reruns, it turns off the switcher preventing the power
drawn from the USB charger. If battery is not present then the device
will run without any input power when APSD rerun happens. This will
cause a brownout.
Prevent running APSD while battery is missing. The USB type detected
may not be correct but this prevents brownout.
CRs-Fixed: 834342
Change-Id: I933246b3bbb2abc97bdc927d5ab2a882fb100e68
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
OTG remains disabled on SCHG LITE if a over-current condition is hit.
Re-enable OTG by resetting the OTG_EN bit.
Change-Id: Ie8ddce2f5d00d90cd1acd468f64196bec64fa53b
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Fix uninitialized access when dc_psy is not registered
and charging is enabled by sysfs interface.
CRs-Fixed: 836629
Change-Id: I88f1f2253c357a62589ea750a4394ef289f5573e
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
HVDCP detection is not notified immediately to userspace.
Fix this by calling power_supply_changed after the charger is
identified as HVDCP.
CRs-Fixed: 836728
Change-Id: Ia58b18a854cada7f5f187babe19a1f0e71659adf
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Currently USB APSD reruns are enabled by default and it is not needed on
MSM8994 devices. Make this feature selectively configurable to avoid the
extra detection time on platforms where this is not needed.
CRs-Fixed: 837882
Change-Id: If4e07d0ed5653ee3fe111a03748a9d0f1acbddac
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
As for PM8941 V3 chip, ITERM setting changed to 80mA base
and 40mA step, update the driver to follow it.
Change-Id: I27b3c20c953fc0c686298a6bd8925517f6088129
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
Currently when the fuel gauge driver probes, hardware init and
updating SRAM parameters consumes more time because of the
internal SRAM access adding up to the delay.
Move these functions from the probe to a scheduled work so that
the driver probe function can finish up early improving up the
boot time.
Also, move the fg_hw_init routine to the front of the
initialization work in order to ensure that the hardware gets
initialized before the SRAM parameters are read.
CRs-Fixed: 835416
Change-Id: I410be1c2e9093b0f238b2affcee0f7c694a3eaee
Signed-off-by: Jie Cheng <rockiec@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Ashay Jaiswal
Linux Build Service Account
Subbaraman Narayanamurthy
Murali Nalajala
Anirudh Ghayal
Xiaozhe Shi
Srinivas Rao L
Mahesh Sivasubramanian
Lijuan Gao
Chunmei Cai
Abhijeet Dharmapurikar
Qiang Huang
Maulik Shah
Nicholas Troast
Fenglin Wu
Zhenhua Huang
Jie Cheng
Shiju Mathew