Commit graph

417621 commits

Author SHA1 Message Date
Radha Mohan Chintakuntla 150abb345e arm64: Add boot time configuration of Intermediate Physical Address size
ARMv8 supports a range of physical address bit sizes. The PARange bits
from ID_AA64MMFR0_EL1 register are read during boot-time and the
intermediate physical address size bits are written in the translation
control registers (TCR_EL1 and VTCR_EL2).

There is no change in the VA bits and levels of translation.

Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Will Deacon <Will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 87366d8cf7b3f6dc34633938aa8766e5a390ce33
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:31 -07:00
Marek Szyprowski b048193bb6 arm64: add support for reserved memory defined by device tree
Enable reserved memory initialization from device tree.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 9bf14b7c540ae9ca7747af3a0c0d8470ef77b6ce
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:31 -07:00
Will Deacon d297119a1c arm64: barriers: add dmb barrier
Commit 8adbf57fc429 ("irqchip: gic: use dmb ishst instead of dsb when
raising a softirq") added an explicit dmb(...) call to the GIC driver.

This patch adds a simple dmb() macro to arm64, which expands to a DMB SY
instruction.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: d152d22a18c240286c19997a6249ee76ea055926
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:30 -07:00
Ard Biesheuvel 29686b268e arm64: advertise ARMv8 extensions to 32-bit compat ELF binaries
This adds support for advertising the presence of ARMv8 Crypto
Extensions in the Aarch32 execution state to 32-bit ELF binaries
running in 32-bit compat mode under the arm64 kernel.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 4cf761cdccc3b050f768f25dc36342cdfec4efdd
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:30 -07:00
Ard Biesheuvel c3d7d95364 arm64: add AT_HWCAP2 support for 32-bit compat
Add support for the ELF auxv entry AT_HWCAP2 when running 32-bit
ELF binaries in compat mode.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 28964d32d495a0753986d464c48c8e1ae73699be
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:29 -07:00
Heiko Carstens e89d22ffdc compat: let architectures define __ARCH_WANT_COMPAT_SYS_GETDENTS64
For architecture dependent compat syscalls in common code an architecture
must define something like __ARCH_WANT_<WHATEVER> if it wants to use the
code.
This however is not true for compat_sys_getdents64 for which architectures
must define __ARCH_OMIT_COMPAT_SYS_GETDENTS64 if they do not want the code.

This leads to the situation where all architectures, except mips, get the
compat code but only x86_64, arm64 and the generic syscall architectures
actually use it.

So invert the logic, so that architectures actively must do something to
get the compat code.

This way a couple of architectures get rid of otherwise dead code.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 0473c9b5f05948df780bbc7b996dd7aefc4ec41d
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:28 -07:00
Mark Rutland 9a2a75516a arm64: remove unnecessary cache flush at boot
Currently we flush the entire dcache at boot within __cpu_setup, but
this is unnecessary as the booting protocol demands that the dcache is
invalid and off upon entering the kernel. The presence of the cache
flush only serves to hide bugs in bootloaders, and is not safe in the
presence of SMP.

In an SMP boot scenario the CPUs enter coherency outside of the kernel,
and the primary CPU enables its caches before bringing up secondary
CPUs. Therefore if any secondary CPU has an entry in its cache (in
violation of the boot protocol), the primary CPU might snoop it even if
the secondary CPU's cache is disabled. The boot-time cache flush only
serves to hide a firmware bug, and slows down a cpu boot unnecessarily.

This patch removes the unnecessary boot-time cache flush.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
[catalin.marinas@arm.com: make __flush_dcache_all local only]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: bff705950e2cdcf35641dee35eb14bad9ed49e8f
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:28 -07:00
Marc Zyngier 073184692d arm64: KVM: flush VM pages before letting the guest enable caches
When the guest runs with caches disabled (like in an early boot
sequence, for example), all the writes are diectly going to RAM,
bypassing the caches altogether.

Once the MMU and caches are enabled, whatever sits in the cache
becomes suddenly visible, which isn't what the guest expects.

A way to avoid this potential disaster is to invalidate the cache
when the MMU is being turned on. For this, we hook into the SCTLR_EL1
trapping code, and scan the stage-2 page tables, invalidating the
pages/sections that have already been mapped in.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 9d218a1fcf4c6b759d442ef702842fae92e1ea61
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:27 -07:00
Marc Zyngier 7e95f8e680 ARM: KVM: introduce kvm_p*d_addr_end
The use of p*d_addr_end with stage-2 translation is slightly dodgy,
as the IPA is 40bits, while all the p*d_addr_end helpers are
taking an unsigned long (arm64 is fine with that as unligned long
is 64bit).

The fix is to introduce 64bit clean versions of the same helpers,
and use them in the stage-2 page table code.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:27 -07:00
Marc Zyngier 7678e8aad8 arm64: KVM: trap VM system registers until MMU and caches are ON
In order to be able to detect the point where the guest enables
its MMU and caches, trap all the VM related system registers.

Once we see the guest enabling both the MMU and the caches, we
can go back to a saner mode of operation, which is to leave these
registers in complete control of the guest.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 4d44923b17bff283c002ed961373848284aaff1b
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:26 -07:00
Marc Zyngier 35b7d07ec4 arm64: KVM: allows discrimination of AArch32 sysreg access
The current handling of AArch32 trapping is slightly less than
perfect, as it is not possible (from a handler point of view)
to distinguish it from an AArch64 access, nor to tell a 32bit
from a 64bit access either.

Fix this by introducing two additional flags:
- is_aarch32: true if the access was made in AArch32 mode
- is_32bit: true if is_aarch32 == true and a MCR/MRC instruction
  was used to perform the access (as opposed to MCRR/MRRC).

This allows a handler to cover all the possible conditions in which
a system register gets trapped.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 2072d29c46b73e39b3c6c56c6027af77086f45fd
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:26 -07:00
Marc Zyngier 404d6320b8 arm64: KVM: force cache clean on page fault when caches are off
In order for the guest with caches off to observe data written
contained in a given page, we need to make sure that page is
committed to memory, and not just hanging in the cache (as
guest accesses are completely bypassing the cache until it
decides to enable it).

For this purpose, hook into the coherent_icache_guest_page
function and flush the region if the guest SCTLR_EL1
register doesn't show the MMU  and caches as being enabled.
The function also get renamed to coherent_cache_guest_page.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 2d58b733c87689d3d5144e4ac94ea861cc729145
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:25 -07:00
Rob Herring 37b87f5b1d cpufreq: enable ARM drivers on arm64
Enable cpufreq and power kconfig menus on arm64 along with arm cpufreq
drivers. The power menu is needed for OPP support. At least on Calxeda
systems, the same cpufreq driver is used for arm and arm64 based
systems.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 52e7e816420383a340cfb6c3ffd12477c3c80b76
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:24 -07:00
Vladimir Murzin 382fb6e30e arm64: remove return value form psci_init()
psci_init() is written to return err code if something goes wrong. However,
the single user, setup_arch(), doesn't care about it. Moreover, every error
path is supplied with a clear message which is enough for pleasant debugging.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 64b4f60f497058f1c6ba118a0260249ee5c091a6
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:24 -07:00
Vladimir Murzin fbaf19c55f arm64: remove redundant "psci:" prefixes
Since 652af899799354049b273af897b798b8f03fdd88 "arm64: factor out spin-table
boot method" psci prefix's been introduced. We have a common pr_fmt, so clean
them up.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 288ac26cc2334e5e6ecad6416e9bf750691afd84
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:23 -07:00
Nathan Lynch dbe807c39f arm64: vdso: clean up vdso_pagelist initialization
Remove some unnecessary bits that were apparently carried over from
another architecture's implementation:

- No need to get_page() the vdso text/data - these are part of the
  kernel image.
- No need for ClearPageReserved on the vdso text.
- No need to vmap the first text page to check the ELF header - this
  can be done through &vdso_start.

Also some minor cleanup:
- Use kcalloc for vdso_pagelist array allocation.
- Don't print on allocation failure, slab/slub will do that for us.

Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 16fb1a9bec6126162560f159df449e4781560807
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:23 -07:00
Geoff Levand 17321e6dd1 arm64: Fix the soft_restart routine
Change the soft_restart() routine to call cpu_reset() at its identity mapped
physical address.

The cpu_reset() routine must be called at its identity mapped physical address
so that when the MMU is turned off the instruction pointer will be at the correct
location in physical memory.

Signed-off-by: Geoff Levand <geoff@infradead.org> for Huawei, Linaro
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 09024aa61e1bc994404683e2e5b363484a15dd12
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:22 -07:00
Catalin Marinas 76f2584b1f arm64: Convert asm/tlb.h to generic mmu_gather
Over the past couple of years, the generic mmu_gather gained range
tracking - 597e1c3580 (mm/mmu_gather: enable tlb flush range in generic
mmu_gather), 2b047252d087 (Fix TLB gather virtual address range
invalidation corner cases) - and tlb_fast_mode() has been removed -
29eb77825c (arch, mm: Remove tlb_fast_mode()).

The new mmu_gather structure is now suitable for arm64 and this patch
converts the arch asm/tlb.h to the generic code. One functional
difference is the shift_arg_pages() case where previously the code was
flushing the full mm (no tlb_start_vma call) but now it flushes the
range given to tlb_gather_mmu() (possibly slightly more efficient
previously).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 020c1427f3ad73c86fd566d86441e673adfe2ecb
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:22 -07:00
Catalin Marinas 5a8aef99e7 arm64: Extend the PCI I/O space to 16MB
The patch moves the PCI I/O space (currently at 64K) before the
earlyprintk mapping and extends it to 16MB.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 22bd1c91fe13d59cff734b69b6757adcfbd8dee9
[joonwoop@codeaurora.org: fixed trivial merge conflict.  arm64 pcie
 change merged first]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:21 -07:00
Vijaya Kumar K e296f35e02 arm64: enable processor debug state for secondary cpus
processor debug state PSTATE.D is unmasked in smp call
clear_os_lock for secondary cpus. So debug state is still
masked in normal kernel context.  With this patch, unmask
debug state on secondary boot for the cpus in normal kernel
context. Now kgdb tests passed with multicore.

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: d8ed442a009ecfe155b57d58f231db3d6084633d
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:20 -07:00
Vijaya Kumar K 95f2679733 arm64: KGDB: Add KGDB config
Add HAVE_ARCH_KGDB for arm64 Kconfig

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 9529247db9ecfc5a723e17093614e7437ab0d5bd
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:20 -07:00
Vijaya Kumar K bc051aeb8d misc: debug: remove compilation warnings
typecast instruction_pointer macro to unsigned long to
resolve following compiler warnings like
warning: format '%lx' expects argument of type 'long unsigned int',
but argument 2 has type 'u64' [-Wformat]

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 58dcc204f18af2821f683b235bb376f9db2557f5
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:19 -07:00
Vijaya Kumar K 1545f21cc0 arm64: KGDB: Add step debugging support
Add KGDB software step debugging support for EL1 debug
in AArch64 mode.

KGDB registers step debug handler with debug monitor.
On receiving 'step' command from GDB tool, target enables
software step debugging and step address is updated in ELR.

Software Step debugging is disabled when 'continue' command
is received

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 44679a4f142b69ae0c68ed815a48bbd164827281
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:19 -07:00
Vijaya Kumar K 3c91022e92 arm64: KGDB: Add Basic KGDB support
Add KGDB debug support for kernel debugging.
With this patch, basic KGDB debugging is possible.GDB register
layout is updated and GDB tool can establish connection with
target and can set/clear breakpoints.

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: bcf5763b0d58d20e288ac52f96cbd7788e262cac
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:18 -07:00
Vijaya Kumar K a4f8e05f4e arm64: Add macros to manage processor debug state
Add macros to enable and disable to manage PSTATE.D
for debugging. The macros local_dbg_save and local_dbg_restore
are moved to irqflags.h file

KGDB boot tests fail because of PSTATE.D is masked.
unmask it for debugging support

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: c7db4ff5d2b459a579d348532a92fd5885520ce6
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:18 -07:00
Nicolas Pitre c31ed3c063 cpuidle/arm64: Remove redundant cpuidle_idle_call()
The core idle loop now takes care of it.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
Cc: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-pm@vger.kernel.org
Cc: linaro-kernel@lists.linaro.org
Link: http://lkml.kernel.org/n/tip-wk9vpc8dsn46s12pl602ljpo@git.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: 6990566b535908905b4eccda7cc9e09c2db52187
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:17 -07:00
Tim Chen 3caa6fcb90 locking/mcs: Allow architecture specific asm files to be used for contended case
This patch allows each architecture to add its specific assembly optimized
arch_mcs_spin_lock_contended and arch_mcs_spinlock_uncontended for
MCS lock and unlock functions.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Scott J Norton <scott.norton@hp.com>
Cc: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Cc: AswinChandramouleeswaran <aswin@hp.com>
Cc: George Spelvin <linux@horizon.com>
Cc: Rik vanRiel <riel@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: MichelLespinasse <walken@google.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Alex Shi <alex.shi@linaro.org>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Figo.zhang" <figo1802@gmail.com>
Cc: "Paul E.McKenney" <paulmck@linux.vnet.ibm.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Davidlohr Bueso <davidlohr.bueso@hp.com>
Cc: Waiman Long <waiman.long@hp.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matthew R Wilcox <matthew.r.wilcox@intel.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1390347382.3138.67.camel@schen9-DESK
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: ddf1d169c0a489d498c1799a7043904a43b0c159
[joonwoop@codeaurora.org: Resolve merge conflicts; we don't have changes
for arch other than ARM/ARM64]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:16 -07:00
Tim Chen 9306555406 locking/mcs: Order the header files in Kbuild of each architecture in alphabetical order
We perform a clean up of the Kbuid files in each architecture.
We order the files in each Kbuild in alphabetical order
by running the below script.

for i in arch/*/include/asm/Kbuild
do
        cat $i | gawk '/^generic-y/ {
                i = 3;
                do {
                        for (; i <= NF; i++) {
                                if ($i == "\\") {
                                        getline;
                                        i = 1;
                                        continue;
                                }
                                if ($i != "")
                                        hdr[$i] = $i;
                        }
                        break;
                } while (1);
                next;
        }
        // {
                print $0;
        }
        END {
                n = asort(hdr);
                for (i = 1; i <= n; i++)
                        print "generic-y += " hdr[i];
        }' > ${i}.sorted;
        mv ${i}.sorted $i;
done

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Matthew R Wilcox <matthew.r.wilcox@intel.com>
Cc: AswinChandramouleeswaran <aswin@hp.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: "Paul E.McKenney" <paulmck@linux.vnet.ibm.com>
Cc: Scott J Norton <scott.norton@hp.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: "Figo.zhang" <figo1802@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Waiman Long <waiman.long@hp.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Alex Shi <alex.shi@linaro.org>
Cc: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: George Spelvin <linux@horizon.com>
Cc: MichelLespinasse <walken@google.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Davidlohr Bueso <davidlohr.bueso@hp.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
[ Fixed build bug. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: b119fa61d440fe0f5af504299ad506637585a8ca
[joonwoop@codeaurora.org: resolved conflict due to missing Kbuild files.]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2014-08-15 11:41:16 -07:00
Linux Build Service Account 3c4a9994ec Merge "ASoC: wcd9xxx: Changes for High performance mode" 2014-08-15 04:52:00 -07:00
Linux Build Service Account d3037dd86f Merge "ASoC: wcd: handle micbias and current source properly" 2014-08-15 04:51:57 -07:00
Linux Build Service Account cb5f0d53ce Merge "ARM: dts: msm: Add static rules to throttle CPU on 8916" 2014-08-15 04:51:55 -07:00
Linux Build Service Account dd88ecf0ff Merge "clk: qcom: Add support for root clock-name as core_root_clk" 2014-08-15 04:51:52 -07:00
Linux Build Service Account f04a2b3f59 Merge "qcom-cpufreq: Remove per-cpu workqueue" 2014-08-15 04:51:50 -07:00
Linux Build Service Account e28f160b3c Merge "arm: msm: Remove MSM_CPU_FREQ_SET_MIN_MAX related config" 2014-08-15 04:51:48 -07:00
Linux Build Service Account 2e58772e5d Merge "ARM: dts: msm: Add dummy regulators in fsm9900" 2014-08-15 04:51:47 -07:00
Linux Build Service Account 4975ca4da6 Merge "wcnss: Change WCNSS_VBATT_GUARD value from 200uV to 20mV" 2014-08-15 04:51:39 -07:00
Linux Build Service Account 63be24402f Merge "msm: ipa: add support for WDI stats" 2014-08-15 04:51:31 -07:00
Linux Build Service Account d6317090c1 Merge "ARM: dts: msm: update us_euro gpio configurations" 2014-08-15 04:51:28 -07:00
Linux Build Service Account bb8eb36eee Merge "msm: kgsl: Move VBIF register programming to device start" 2014-08-15 04:51:25 -07:00
Linux Build Service Account 67bf433d1f Merge "msm: kgsl: Attach secure context bank when mapping secure buffer" 2014-08-15 04:51:24 -07:00
Linux Build Service Account 75c142f2ad Merge "msm: kgsl: Add content protection changes for A430" 2014-08-15 04:51:23 -07:00
Linux Build Service Account bd64344c75 Merge "cnss: Add beeliner suppport" 2014-08-15 04:51:21 -07:00
Linux Build Service Account 5918f1d022 Merge "msm: mdss: send panic/robust signal to bimc on ferrum" 2014-08-15 04:51:19 -07:00
Linux Build Service Account b3cd5e99a4 Merge "ARM: dts: msm: Add vendor specific prefix for MSM8994 BCL properties" 2014-08-15 04:51:13 -07:00
Linux Build Service Account 2ed9d2123d Merge "ARM: dts: msm: Add vendor specific prefix for APQ8084 BCL properties" 2014-08-15 04:51:12 -07:00
Linux Build Service Account d4773f334e Merge "power: bcl: Add vendor specific prefix to the device tree entries" 2014-08-15 04:51:11 -07:00
Linux Build Service Account 33ffe5ab18 Merge "ARM: dts: msm: Configure BCL to hotplug CPUs in MSM8994" 2014-08-15 04:51:09 -07:00
Linux Build Service Account 8e2421c27f Merge "power: bcl: Add support to use CPU phandles for hotplug" 2014-08-15 04:51:08 -07:00
Linux Build Service Account b01831c03b Merge "ARM: dts: msm: Remove Gfx warm to normal temperature monitor" 2014-08-15 04:51:05 -07:00
Linux Build Service Account c5a49cc81b Merge "msm: thermal: Decouple Gfx phase control monitoring" 2014-08-15 04:51:03 -07:00