Reduce insert and remove debounce value on wcd9335 to 96msec
to improve device switch latency during audio playback usecase.
Change sets the insert and remove debounce to 96msec.
Change-Id: I62a4e29af050da3b6be4afc1267b1b03f786c63e
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
In CQ mode, there is no way to distinguish between
READ or WRITE request. Hence, acquire the QoS lock
for little cluster for the entire period of transfer.
This would result in a slight performance improvement
in single threaded transfers.
CRs-fixed: 891366
Change-Id: I9185393250cc0b4bfe8a6f337f834c760b4ebed3
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Clear TX HOLD when ANC is enabled and decimator
10 to 13 are selected.
Change-Id: I18c1ddeacc59c1ae7d88daf371c84140c0459693
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Soundwire hardware has two banks for configuring soundwire
slave ports. After playback is stopped, disable soundwire slave
ports in both banks to avoid any port collisions during the start
of next playback on other slave device.
Change-Id: I5cfd1d985a1ca5fd7b4020d7e14697642f207501
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Change RX disconnect port sequence so as to avoid
slimbus underflow and audio mute issues during
playback.
Change-Id: I0260e61b78e3bcfe422896dc60b15af84be424a4
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Export sched_setscheduler_nocheck() so that external kernel modules
can use it.
Change-Id: Ib50f537f5aef50c365ba63fb8ffce05bc1c7c431
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
DPM is interested in only BIND and LISTEN events.
Change-Id: Iae11027945b981538f9c16ae9d5cd1ecf88a3743
Signed-off-by: Susheel Yadagiri <syadagir@codeaurora.org>
lpm-level headers required only when CONFIG_MSM_PM is set.
To compile msm kernel for other targets (arch=um), add config
check to include lpm levels.
Change-Id: Ia1bd51da4952e56b945a5e51a3b1ff8aaa643cd5
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Randomize the load address of modules in the kernel to make kASLR
effective for modules. Modules can only be loaded within a particular
range of virtual address space. This patch adds 10 bits of entropy to
the load address by adding 1-1024 * PAGE_SIZE to the beginning range
where modules are loaded.
The single base offset was chosen because randomizing each module
load ends up wasting/fragmenting memory too much. Prior approaches to
minimizing fragmentation while doing randomization tend to result in
worse entropy than just doing a single base address offset.
Example kASLR boot without this change, with a single module loaded:
---[ Modules ]---
0xffffffffc0000000-0xffffffffc0001000 4K ro GLB x pte
0xffffffffc0001000-0xffffffffc0002000 4K ro GLB NX pte
0xffffffffc0002000-0xffffffffc0004000 8K RW GLB NX pte
0xffffffffc0004000-0xffffffffc0200000 2032K pte
0xffffffffc0200000-0xffffffffff000000 1006M pmd
---[ End Modules ]---
Example kASLR boot after this change, same module loaded:
---[ Modules ]---
0xffffffffc0000000-0xffffffffc0200000 2M pmd
0xffffffffc0200000-0xffffffffc03bf000 1788K pte
0xffffffffc03bf000-0xffffffffc03c0000 4K ro GLB x pte
0xffffffffc03c0000-0xffffffffc03c1000 4K ro GLB NX pte
0xffffffffc03c1000-0xffffffffc03c3000 8K RW GLB NX pte
0xffffffffc03c3000-0xffffffffc0400000 244K pte
0xffffffffc0400000-0xffffffffff000000 1004M pmd
---[ End Modules ]---
Signed-off-by: Andy Honig <ahonig@google.com>
Link: http://lkml.kernel.org/r/20140226005916.GA27083@www.outflux.net
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: e2b32e6785138d92d2a40e0d0473575c8c7310a2
[clingulta@codeaurora.org: resolve trivial merge conflicts, caused by
commit 'a37ad2682' for arch=um]
Change-Id: I44dadf731c8becd301d57ee38f869fe646b383ed
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Outputting BAM register dump to kernel log could consume
significant resource when the amount of registers is big. The
change here is to output BAM register dump to IPC log only as long
as IPC logging is enabled in the build.
Change-Id: Ibbd31bb2e97785008117c56da250beddbd75d958
Signed-off-by: Yan He <yanhe@codeaurora.org>
Enable enhanced strobe support for host so that if card
supports it, then core layer will detect the card in this
mode.
Change-Id: Id1d5a4251acbb980f195053a2414907274f0ca6c
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This patch adds checks in msm host driver to check if card
also supports enhanced strobe before changing strobe specific
host configuration.
Change-Id: Iab4833e80600c4ad89b16c76b52e917f885eea0e
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
When sending CMD during data in HS400 Enhanced Strobe mode,
the command that is being sent is also sampled internally on
CMDIN line by the RCLK that is toggling due to the data traffic.
To mask this <false> CMDIN a new mask is introduced throughout
the CMD transmission time. This mask is controlled by
HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register.
The default reset value of this register is 2.
Before running CMDQ transfers in HS400 Enhanced Strobe mode,
SW should write 3 to
HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register.
Change-Id: If0467855e23cb93e57a4581b375885136902835d
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Provide sdhci host ops of enhanced strobe to notify
sdhci-msm on enabling/disabling cmdq. This is needed
because of following:
Before running CMDQ transfers in HS400 Enhanced Strobe mode,
SW should write 3 to
HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register.
Default reset value of this register is 2.
Change-Id: I987605cd21f137dea49ddf3e8db3f1f41b5b501f
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Provide cmdq_host ops of enhanced strobe to notify
sdhci on enabling/disabling cmdq. This is needed
because of following:
Before running CMDQ transfers in HS400 Enhanced Strobe mode,
SW should write 3 to
HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register.
Default reset value of this register is 2.
Change-Id: I36ead91ca8c9aeed967f120f8bdc3d2180af7746
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
On some platforms, RMNET and RNDIS interfaces uses BAM2BAM
over IPA for data path. We might need USB BAM registers for
analyzing data stall issues, which results in target crash.
Hence add support for registering panic notifier callback
and also dumping USB BAM registers in callback when it is called
during panic.
Change-Id: I96c52e27307340c8ec5ae0f1f9e20cae0c7bd5bb
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Keep optimum powerlevels for msm8976 to help
performance and power.
Change-Id: Ie387152c37b433b330fa360de15ddddbb11d2876
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
