Fix instances of returning from functions without
unlocking the mutex.
CRs-fixed: 763775
Change-Id: I47d88f86fd207297ba3ba0f481bdaf901a751cfb
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
The empty soc interrupt in the fuel gauge is the last line of defense
for the fuel gauge to report 0% before the phone runs out of battery
power. Allow the threshold at which this interrupt triggers at to be
configured via the device tree in the fuel gauge driver as
qcom,irq-volt-empty-mv.
CRs-Fixed: 758265
Change-Id: I6f6fa07e3cca1119d7ff6e6cab9e20100e0eea80
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
The empty soc interrupt is a voltage based interrupt that triggers
whenever the battery voltage is below a programmed threshold. This is
intended to be a last line of defense in case the soc count is
inaccurate.
In order to prevent UVLOs, immediately report zero soc whenever the empty
soc is raised.
CRs-Fixed: 756489
Change-Id: Ib3c8cc06efa1a834704fc166a393e9959ed01f0e
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
Fix IPA stall when do SAP on/off during high
data transfer rate. Change the IPA-pipe reset
sequence.
Change-Id: I4754e15f41d87ba22e860ef9bdcb91b17d781d08
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
If the panel is programmed with incorrect resolution then
during the probe it gets corrected. During suspend this
might be lost because of reset. Reconfigure the resolution
parameters in such cases.
CRs-fixed: 751477
Change-Id: I7ba3acd2d0bad7e2359563cd7344a1ab95aa6319
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Enable bus debug voter feature for msm8994. This allows
setting a floor for bus clocks.
Change-Id: I92da950a56f09b35e3d95f4840702bdc60263702
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Introduce a new module to allow clients to set a floor vote on bus clocks
either using an API or via sysfs interface. Clients are still always
recommended to use standard bus scaling APIs , these new APIs are a debug
feature and a meant for debugging system performance issues.
Change-Id: I7688e391413c23d9024a7b525f60c90f317d0847
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Add new APIs to the bus scaling driver. The new APIs make it
easier for clients to setup paths for bus scaling. The driver APIs
will return a pointer to a client handle in case of success and NULL or
error in cases of failure. For now the existing APIs will remain as is
eventually all clients will start switching over to the new APIs.
Change-Id: I22656dddf13802128ee5c4faab9f83f9c6f8e683
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
qcom-sps-dma driver provides DMA-engine interface for the
sps-BAM driver. This driver enables external bus drivers
to replace the underlying DMA HW seamlessly.
The client drivers are responsible for setting clocks on,
before calling DMA services. On a client call,
qcom-sps-dma checks if the BAM device is initialized,
and if it is not, it initializes it before handling
transfers.
Clients configure their DMA channels by adding dmas and
dma-names in their device tree nodes, and use a phandle
to point to the required qcom-sps-dma instance. Before
using that channels, clients are required to configure them
with the DMA transfer direction.
Change-Id: I15279cc57fed7c93b4a36e29de73dd617da76186
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: Ankit Gupta <ankgupta@codeaurora.org>
When there is no ramdump memory available, Subsystem Restart(SSR)
should work as expected. But if ramdump memory is not available
then subsystem device node would be offline because of not
calling subsystem_get. This would cause SSR to be aborted when
CNSS crash is detected. Fix the issue by calling subsystem_get
even when ramdump memory is not available where in CNSS SSR would
be triggered just that ramdump wouldn't be collected.
CRs-fixed: 762694
Change-Id: I65d867018ac99adca5c27056660dbefde34d93ca
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
Add fde flag to dtsi file to support full disk encryption on
msm8939 target.
Change-Id: I5d9bf838d1234981de36723b12aa245c3e93ee81
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
The vbif_bw governor should vote for AB tracking a
bus usage counter. Vote for the previous bus usage
in the next itteration.
Change-Id: I613187646a261aed733ea5f1c0e413deac3a437c
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Modify the power control code and vbif_bw governor
to allow dynamic AB votes to be set with each GPU
IB vote. As a placeholder set a static AB vote of
one fourth the IB vote.
Change-Id: I3edb430f9a4545f008ec81b75ddff3c717e91e39
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Currently APPS processor receives interrupts from all
IPC FIFOS (including FIFOS not relevant to APPS).
Change KRAIT_IPC_INTR_ENAB to receive only APPS IPC FIFO
interrupts. This will reduce APPS CPU load by avoiding
non-relevant interupts.
Change-Id: Ic1556367b9bde63f8ff92aae41ed67b7da4f152a
Acked-by: Vijayapal Akula <akulav@qti.qualcomm.com>
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
This option was temporary disabled to allow
softwre development to continue. The issue behind
the present L2 error is resolved. Enable panic to
catch other L2 errors in future.
Change-Id: I48b8c5f3d838821ebd604a66e3a9d292a4b082ca
Acked-by: Kaushik Sikdar <ksikdar@qti.qualcomm.com>
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Update MPU6050 driver to add "set latency" and "flush"
interface, with these new interface sensor can run in
batching mode, a sensor in batching mode will buffer
sensor events into its internal FIFO and process them
in batch.
Change-Id: I71906f966e73c8134e22b425fcb613e015ee0712
Signed-off-by: Bingzhe Cai <bingzhec@codeaurora.org>
This is a fix for 2b490d2c27.
The previous change is to allow writing a register address 0x00.
To delete a condition of "if the address is 0", it removed the
multiple data writing part for sequential address. The change
introduces the issue from sequential addreess/data writing.
(Instead of making a packet :
<address_0x20><data_0xA><data_0xB><data_0xC>,
It makes seperate packets with a wrong address. The addresses
of all packets from the second are 0x0 that is not valid. :
<address_0x20><data_0xA>, <address_0x0><data_0xB>, ...)
For proper change, revert the sequential address/data writing
part. But to write the packet which address is actually 0x0,
add the seperate command of "MSM_CCI_I2C_WRITE_SEQ" and
use this condition to differentiate
between normal packet writing and sequential address writing.
Change-Id: Ibd8f7fad2629504abfee1fa66b08258e04865530
Signed-off-by: Kyong Hwa Bae <kbae@codeaurora.org>
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
