android_kernel_samsung_msm8976/arch/arm64/lib
Yuanyuan Zhong b4c98bc799 arm64: strcmp: align to 64B cache line
Align strcmp to 64B. This will ensure the preformance critical
loop is within one 64B cache line.

Change-Id: I9240fbb4407637b2290a44e02ad59098a377b356
Signed-off-by: Yuanyuan Zhong <zyy@motorola.com>
Reviewed-on: https://gerrit.mot.com/902536
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Reviewed-by: Igor Kovalenko <igork@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
2017-04-18 12:17:54 +02:00
..
bitops.S
clear_page.S
clear_user.S
copy_from_user.S arm64: lib: use pair accessors for copy_*_user routines 2017-04-18 12:17:42 +02:00
copy_in_user.S arm64: lib: use pair accessors for copy_*_user routines 2017-04-18 12:17:42 +02:00
copy_page.S arm64: lib: improve copy_page to deal with 128 bytes at a time 2017-04-18 12:17:45 +02:00
copy_to_user.S arm64: lib: use pair accessors for copy_*_user routines 2017-04-18 12:17:42 +02:00
delay.c
Makefile
memchr.S
memcmp.S
memcpy.S arm64: lib: memory utilities optimization 2017-04-18 12:17:48 +02:00
memmove.S arm64: lib: memory utilities optimization 2017-04-18 12:17:48 +02:00
memset.S
strchr.S
strcmp.S arm64: strcmp: align to 64B cache line 2017-04-18 12:17:54 +02:00
strlen.S
strncmp.S
strnlen.S
strrchr.S