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b4c98bc799
Align strcmp to 64B. This will ensure the preformance critical loop is within one 64B cache line. Change-Id: I9240fbb4407637b2290a44e02ad59098a377b356 Signed-off-by: Yuanyuan Zhong <zyy@motorola.com> Reviewed-on: https://gerrit.mot.com/902536 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver <sltawvr@motorola.com> Tested-by: Jira Key <jirakey@motorola.com> Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com> Reviewed-by: Igor Kovalenko <igork@motorola.com> Submit-Approved: Jira Key <jirakey@motorola.com> |
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| .. | ||
| bitops.S | ||
| clear_page.S | ||
| clear_user.S | ||
| copy_from_user.S | ||
| copy_in_user.S | ||
| copy_page.S | ||
| copy_to_user.S | ||
| delay.c | ||
| Makefile | ||
| memchr.S | ||
| memcmp.S | ||
| memcpy.S | ||
| memmove.S | ||
| memset.S | ||
| strchr.S | ||
| strcmp.S | ||
| strlen.S | ||
| strncmp.S | ||
| strnlen.S | ||
| strrchr.S | ||