On 8064, ADSP image is loaded when pcm_open is
called for the first time. This caused the first
audio playback to be delayed. To fix this, adsp_loader
is modified to load ADSP firmware using pil.
Bug: 8204207
Signed-off-by: Alexy Joseph <alexyj@codeaurora.org>
Signed-off-by: Mekala Natarajan <mekalan@codeaurora.org>
Signed-off-by: Vineeta Srivastava <vsrivastava@google.com>
Signed-off-by: Ed Tam <etam@google.com>
When pagefault happens do not cancel the faulting transaction if
the registered fault handler returns EBUSY error. This way
drivers can control when they want to resume the transaction.
Change-Id: Ia4563da073ab04174803101c3b8ec82b0571850e
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
A misconfigured board file could cause an out-of-bounds
array access through this value.
Change-Id: I64bbad0c096a2efe65376991537d810141370d72
CRs-Fixed: 439230
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Remove printing of "invalid context_id" messages and
replace those with simply returning with -EINVAL. The
messages serve little purpose and their removal alleviates
kernel log spamming.
CRs-fixed: 449050
Change-Id: Id0d6538d228e7dc928a628bdffde8c952ec5d6fe
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Make sure cache operations don't hit pagefaults by
backing the entire vma in mmap() instead of faulting
in pages as they're touched. Otherwise, there's a
chance that a later cache operation on the mapping
could trigger an unhandled page fault leading to
a kernel panic.
Change-Id: Ia73c8aaed2708c5b9ef46ed50fb0f5cf1ad2450c
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
KGSL_GPUMEM_ALLOC_ID now takes a flag,
KGSL_MEMFLAGS_USE_CPU_MAP. When set, the GPU
mapping will be set up to match the CPU mapping
during mmap(). This feature is only supported when
using per process pagetables with the IOMMU. The
flags field of KGSL_GPUMEM_ALLOC_ID is copied back
to userspace and KGSL_MEMFLAGS_USE_CPU_MAP will
be cleared when this feature is not supported.
The IOMMU virtual address space has been adjusted
when perprocess pagetables is enabled so that the
entire userpace address range (0 to TASK_SIZE) can
have equivalent mappings on the IOMMU. For buffers
that do not have equivalent mappings, the address
range from PAGE_OFFSET to KGSL_IOMMU_GLOBAL_MEM_BASE
is used.
Change-Id: Ib61c03aa7453c3dd901c41e8fd297f66d402ae1a
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
The user allocating memory can provide hints for the caching
settings when said buffer is mapped on the user side. Try
to obey the cache settings when applicable. The user will
be responsible for handling cache management both to and
from the GPU so add a new ioctl IOCTL_KGSL_GPUMEM_CACHE_SYNC to
support both directions (the old IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE)
only handled flushing, not invalidating. The legacy ioctl still
works it just does what it says it does - a cache flush.
Change-Id: Ic0dedbad55ce82f2b01ebc56de30d4649e2e7311
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Previously, the gpu address has been used to uniquely
identify each memory allocation. Upcoming patches will
introduce cases where an allocation does not always
have a gpu address, so an additional id is needed.
IOCTL_KGSL_GPUMEM_ALLOC_ID allocates pages and returns
an id.
IOCTL_KGSL_GPUMEM_FREE_ID frees an id. KGSL_SHAREDMEM_FREE
can still be used to free by GPU address, if it exists.
The id can also be passed to mmap(), shifted left by
PAGE_SIZE to get a CPU mapping for the buffer.
IOCTL_KGSL_GPUMEM_ALLOC_GET_INFO can be called to retrieve
the id and other information about the buffer.
Change-Id: I4b45f0660cb9d4a5fb1323ccc6c4aa360791c1ec
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
The v1 iommu only supports splitting between TTBR0 and TTBR1
on a power of two boundary. Cutting off the userspace address
at 2G (0x80000000) is inconvienient, as the GPU userspace
address space should align with the CPU address space.
This requires changing how global allocations are managed,
since there is no longer a separate pagetable for TTBR1.
The default pagetable is still the master of these allocations
and maintains the gen_pool for allocating global addresses.
But now, these regions are mapped into each process pagetable
by calling kgsl_setup_pt(). This requires kgsl_mmu_map
and kgsl_mmu_unmap to be able to handle mapping without
virtual address allocation.
Change-Id: I94e2d63dc7e6a7ef576f993770725b6b7ba14228
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
These cases have never been a normal operation pattern of the
userspace driver. Sharing buffers through multiple mappings
is better left to dma-buf or ion.
Change-Id: I7e7658137937c96b9505d0f912dcb262d652e0c3
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Some external memory types were using hostptr to store
a userspace virtual address, but other code assumes it is a
kernel virtual address. Make memdesc->hostpr always
be the kernel virtual address and add a useraddr
field for the userspace virtual address.
Change-Id: Id4580a2ff34aeb15f2c1b26a7134f0fd4ec52a6e
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Userspace passes a flag KGSL_MEMFLAGS_GPUREADONLY when
the gpu should not write to a memory region. Use this
flag to control IOMMU_WRITE permissions on the buffer.
Change-Id: I5d3fc615dc36687252e2242f63fe74d6ce1c4fbc
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Make sure iommu_map_range() does not leave a partial
mapping on error if part of the range is already
mapped.
Change-Id: I0ddeb0e0169b579f1efdeca4071fce4ee75a11f8
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Sakshi Agrawal <sakshia@codeaurora.org>
Add security hooks to the binder and implement the hooks for SELinux.
The security hooks enable security modules such as SELinux to implement
controls over binder IPC. The security hooks include support for
controlling what process can become the binder context manager
(binder_set_context_mgr), controlling the ability of a process
to invoke a binder transaction/IPC to another process (binder_transaction),
controlling the ability a process to transfer a binder reference to
another process (binder_transfer_binder), and controlling the ability
of a process to transfer an open file to another process (binder_transfer_file).
This support is used by SE Android, http://selinuxproject.org/page/SEAndroid.
Change-Id: I9a64a87825df2e60b9c51400377af4a9cd1c4049
Signed-off-by: Stephen Smalley <sds@tycho.nsa.gov>
wake_up_process() should never wakeup a TASK_STOPPED/TRACED task.
Change it to use TASK_NORMAL and add the WARN_ON().
TASK_ALL has no other users, probably can be killed.
Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
putreg() assumes that the tracee is not running and pt_regs_access() can
safely play with its stack. However a killed tracee can return from
ptrace_stop() to the low-level asm code and do RESTORE_REST, this means
that debugger can actually read/modify the kernel stack until the tracee
does SAVE_REST again.
set_task_blockstep() can race with SIGKILL too and in some sense this
race is even worse, the very fact the tracee can be woken up breaks the
logic.
As Linus suggested we can clear TASK_WAKEKILL around the arch_ptrace()
call, this ensures that nobody can ever wakeup the tracee while the
debugger looks at it. Not only this fixes the mentioned problems, we
can do some cleanups/simplifications in arch_ptrace() paths.
Probably ptrace_unfreeze_traced() needs more callers, for example it
makes sense to make the tracee killable for oom-killer before
access_process_vm().
While at it, add the comment into may_ptrace_stop() to explain why
ptrace_stop() still can't rely on SIGKILL and signal_pending_state().
Reported-by: Salman Qazi <sqazi@google.com>
Reported-by: Suleiman Souhlal <suleiman@google.com>
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Iliyan Malchev <malchev@google.com>
Conflicts:
arch/x86/kernel/step.c
Cleanup and preparation for the next change.
signal_wake_up(resume => true) is overused. None of ptrace/jctl callers
actually want to wakeup a TASK_WAKEKILL task, but they can't specify the
necessary mask.
Turn signal_wake_up() into signal_wake_up_state(state), reintroduce
signal_wake_up() as a trivial helper, and add ptrace_signal_wake_up()
which adds __TASK_TRACED.
This way ptrace_signal_wake_up() can work "inside" ptrace_request()
even if the tracee doesn't have the TASK_WAKEKILL bit set.
Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
NV bin is downloaded when wlan driver is loaded. This change
adds support for NV bin download during coldboot of WCNSS and
thus much before wlan driver is loaded. NV bin id not downloaded
by platform driver during SSR.
Change-Id: I44065185e73a9d43ab7e5d731705321522a0e5a1
Acked-by: Rajesh Chauhan <rajeshc@qca.qualcomm.com>
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
Setting net.ipv6.conf.<interface>.accept_ra=2 causes the kernel
to accept RAs even when forwarding is enabled. However, enabling
forwarding purges all default routes on the system, breaking
connectivity until the next RA is received. Fix this by not
purging default routes on interfaces that have accept_ra=2.
Signed-off-by: Lorenzo Colitti <lorenzo@google.com>
Acked-by: YOSHIFUJI Hideaki <yoshfuji@linux-ipv6.org>
Acked-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Iliyan Malchev <malchev@google.com>
get_monotonic_boottime adds three nanonsecond values stored
in longs, followed by an s64. If the long values are all
close to 1e9 the first three additions can overflow and
become negative when added to the s64. Cast the first
value to s64 so that all additions are 64 bit.
Change-Id: Ic996d8b6fbef0b72f2d027b0d8ef5259b5c1a540
Signed-off-by: Colin Cross <ccross@android.com>
This reverts commit 994ff121f0c2e3ff00fa38ae2f8dfde4bda1b332.
PM8921 MPP7 no longer must be kept high at all times for targets
using PCDDR3 memory because newer hardware ensures that memory is
always powered when necessary.
picked from fb3d2f519b3dabf307596389365fe04384d0c3eb
Change-Id: If5691877ea5b0e9c268d32fe4b9458652bf77c7f
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69275
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Tested-by: Sam hblee <Sam_hblee@asus.com>
This is a workaround, for instability seen with leaving gfx footswitch
go on/off.
Separate board-flo-gpu.c is based on board-8064-gpu.c for flo hardware
so that workaround is also added. This refers to the following change
Change-Ids
bbe03d50952ebac9b6fdef315cf12ae57e7963da
Change-Id: Ia49ccae7d2cfc64cf2f22bf053683dc728cc4f20
Signed-off-by: paris_yeh <paris_yeh@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69279
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
The current 8064 frequency plan supports max mdp clk up to 266.667MHz.
CRs-Fixed: 405103
Author is Huaibin Yang <huaibiny@codeaurora.org>
Reference change-id is I326f5becc642399a4a0e9d97752d893752388066
Change-Id: I873d0058602cba7e2239daecce89ee8f7613faa4
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69303
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Tested-by: Sam hblee <Sam_hblee@asus.com>
In order to support extra data during secure playback,
video core meta data buffers need to be allocated from
MFC heap. This is required as both HLOS and video core
have read-write access to this heap. As each meta buffer
size is 8KB and there can be 32 meta & output buffers,
increase the MFC ION heap size by 256KB.
Author is Deepak Verma <dverma@codeaurora.org>
Reference change-id is I033d24c9d02a879e38c5f6d86b2b6c0a767ec25c
Change-Id: I60f595c7e2a2a569dcfa320c7c1e3ff5bdd6f064
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69302
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Tested-by: Sam hblee <Sam_hblee@asus.com>
This branch is currently very outdated. Cherry pick the following
changes in order to bring recent fixes to this branch.
Separate board-flo-*.c is based on board-8064-*.c for flo hardware,
it needs following change to fix build break:
Change-Ids
999ee576589682c27492184c22053d19819c0285
Change-Id: Ic51f927c0efc350372ccc98e2805cbde0bb26cb1
Change-Id: I6187110b272c6032d90b1a42e97bbbc25bd9edce
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69295
Reviewed-by: Nick Cheng <nick_cheng@asus.com>
Tested-by: Nick Cheng <nick_cheng@asus.com>
8960AB and 8064AB have a new revision of the Krait SPM hardware.
The SPM v1.15x on these targets uses a different bit to control the
apc_pdn signal.
Update the SPM sequences for standalone and power collapse to use the
new sequences.
L2 SPM or Krait WFI/Retention sequences are not affected.
CRs-fixed: 419258
Author is Anji Jonnala <anjir@codeaurora.org>
Reference change-id is I3bcf335ac50cd1181047fe1ee1d56ecd507ae35c.
Change-Id: If532e26601e52a3b304cdc0c1856cf0b234dcee0
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69287
Reviewed-by: Singhome Lee <singhome_lee@asus.com>
Tested-by: Singhome Lee <singhome_lee@asus.com>
Re-caculate the index of sysfs project_id because hardware revision
shorten from 3 bits to 2 bits.
Change-Id: I84910ae4d743fc45660f547e2f149c7e75334372
Signed-off-by: paris_yeh <paris_yeh@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69155
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
1. set fps back to 60 for LG panel
for panasonic panel, set to fps 60 still have underrun
2. hard code ab, ib (memory clock) to max for mipi video mode panel
because the priority of display is not high enough, the bandwidth may be robbed by others
for JDI mipi command mode panel, there may not be underrun issue because the panel has framebuffer itself
Change-Id: Id95c56ecf570a7cae8db37eede0b3555b3186bd5
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/69094
Reviewed-by: Yetta Wu <Yetta_Wu@asus.com>
Tested-by: Yetta Wu <Yetta_Wu@asus.com>
Reviewed-by: Warlock Tai <warlock_tai@asus.com>
3-4mA power hit is expected. Keep GFX3D footswitch always on to
resovle instability during suspend and resume testing. In RTB log,
system locks up in and between footswitch_enable() operations when
issue is reproduced.
FIXME: Qualcomm will continue to debug this issue and submit a
formal fix to partner gerrit once this problem is identified.
Change-Id: If5753f9f6e7ebac47a6dbca849b16ee7ba68fceb
Signed-off-by: paris_yeh <paris_yeh@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/68850
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/68854
3V3 is always high in spec, so we need to delay more time after 3V3 on
Change-Id: Iab0ecaecefb98cc6bae441381d233759b235e2ba
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/68839
Reviewed-by: Yetta Wu <Yetta_Wu@asus.com>
Tested-by: Yetta Wu <Yetta_Wu@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
to make charging IC function correctly
Change-Id: I619ee5eccb85e586b8a5adbacc40115547e1d168
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/68687
Reviewed-by: Yetta Wu <Yetta_Wu@asus.com>
Tested-by: Yetta Wu <Yetta_Wu@asus.com>
Reviewed-by: Warlock Tai <warlock_tai@asus.com>
