- Add lowlatency pcm driver for Playback and Recording.
- Add support in target board files
- Add Recording Path to Multimedia5 FE DAI
- Add support in routing, platform, machine drivers
- Add low latency interfaces support in ASM and ADM drivers.
Change-Id: I1beb11db9010534e5aa91179ac6040a41622185d
Signed-off-by: Jayasena Sangaraboina <jsanga@codeaurora.org>
This function is not defined if native ARM timers are used,
leading to compilation errors in shared restart core.
Change-Id: Idbb393f9e5f884d31088be211a5456c1d76b5d02
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
A static mapping is needed for PS_HOLD for increased
robustness of the restart code, especially during a kernel
panic.
Change-Id: I616d1a27024120a4c53d8dbc524c4c38349dc704
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Adds support for Rate Control by setting correct
RC Mode and bit rate.
Change-Id: I0307417f3a517e0aa40f67c5d4835db3ef4ea444
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
When gpios are set to input, we return the input buffer status
from the STATUS1 register when the 'get' gpiochip callback is
invoked. This register also includes a bit that indicates whether
the pin is enabled.
Check to verify the pin is enabled, and if it is then return the
properly masked 1-bit value. Otherwise return an error, since the
API is not valid in this state.
Change-Id: I715e17f076d0dbd67397812f98e308f863c59b7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
-fix address value updates when writing to register blocks
greater than 8 bytes.
-fix an invalid shift value being passed in for the 'invert' parameter.
-fix invalid use of MODE_CTL macros
-cleanup the control register read / write routines to
remove unused parameters.
Change-Id: I42223f30a8c6490370d9a8006ee13e028fe774e6
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
CPR (Core Power Reduction) is a new technology to reduce
the power consumption of SOC using sensors inside the SOC.
Based on the feedback by the CPR controller, we can adjust
the voltage requirement for the SOC.
Add initial driver support for CPR.
Change-Id: I4b59438deb2635c45e45c5efe850c050c14a9165
Signed-off-by: Pankaj Kumar <pakuma@codeaurora.org>
Signed-off-by: Sravan Kumar Ambapuram <asravan@codeaurora.org>
Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
Genlock is needed for synchronization of graphics buffers.
Change-Id: I00a9b54055dc89f6b34c60d543b7ec4e096a8fa7
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Calling RCU functions from within the RCU quiescent state is
illegal and probably a bug. The idlestats code uses an atomic
notifier called from msm_cpuidle_enter() and that atomic notifier
takes an rcu read lock. We could fix this with a raw notifier,
but this code is unused so let's just remove the code entirely.
Change-Id: I319f0eabb56a8721c19a3b2b4bc9a7f416c88384
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add ADSP loader driver to bring ADSP out of reset on demand.
The MSM platforms that use APRv2 driver requires separate driver to
bring ADSP out of reset.
Change-Id: I7d64b0336fac76e71078a3bec0795007ee989643
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
The MSM platforms that turn off LPASS core by default have to bring up
LPASS core prior to talk with it.
Current implementation is during bootup, before the slimbus slave device
is up, the slimbus master on apps would try to configure the slimbus
hardware.
Add APRv2 driver to let adsp loader to bring up LPASS core on and make
slimbus driver to configure hardware after bringing up LPASS core.
Change-Id: I9c45e229e6e4c5c142d8a327509d66d9662b52d4
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
This patch removes the need for the offset parameter in dma bounce
functions. This is required to let dma-mapping framework on ARM
architecture to use common, generic dma_map_ops based dma-mapping
helpers.
Background and more detailed explaination:
dma_*_range_* functions are available from the early days of the dma
mapping api. They are the correct way of doing a partial syncs on the
buffer (usually used by the network device drivers). This patch changes
only the internal implementation of the dma bounce functions to let
them tunnel through dma_map_ops structure. The driver api stays
unchanged, so driver are obliged to call dma_*_range_* functions to
keep code clean and easy to understand.
The only drawback from this patch is reduced detection of the dma api
abuse. Let us consider the following code:
dma_addr = dma_map_single(dev, ptr, 64, DMA_TO_DEVICE);
dma_sync_single_range_for_cpu(dev, dma_addr+16, 0, 32, DMA_TO_DEVICE);
Without the patch such code fails, because dma bounce code is unable
to find the bounce buffer for the given dma_address. After the patch
the above sync call will be equivalent to:
dma_sync_single_range_for_cpu(dev, dma_addr, 16, 32, DMA_TO_DEVICE);
which succeeds.
I don't consider this as a real problem, because DMA API abuse should be
caught by debug_dma_* function family. This patch lets us to simplify
the internal low-level implementation without chaning the driver visible
API.
Change-Id: I9a847e30f345bf5e69fded1747ff79057750fb66
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Replace all uses of ~0 with DMA_ERROR_CODE, what should make the code
easier to read.
Change-Id: I6c0fff904d8df3a9d2a8a727e62faf000a55c1b5
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
If suspend event is received by MDP before panels, MDP needs to ensure
other panels are off before turning MDP clocks off. Remove handlers from
framebuffer driver and handle all suspend logic within MDP driver to
handle this scenario.
Change-Id: Idcda2dd29b28a9993edca78b7e0778985e44b664
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Current clock logic only considers panel pixel clock to calculate mdp
clock speed, MDP clock speed should also consider other factors such
as surface scaling. Bus scaling should also consider surface scaling
factor. Update logic to consider these new factors and perform these
performance updates together.
Change-Id: If274a7f40f496e1a730e1d0e8d7c35fa4384a832
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
When qseecom_unload_app() is invoked, wait_event_freezable() is called
in an atomic context (within a spinlock). wait_event_freezable() allows
sleep and should not be called in an atomic context where sleep is not
allowed.
Change-Id: I8c9c6d28f9e492fbbf2ac74a5ee3d1067c7733ad
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
When panel size is increased dma_alloc_coherent is not able to find
a chunk of contiguous memory big enough to hold framebuffer, this causes
framebuffer initialization to fail. Allocate buffer from ion pool which
has reserved contiguous memory at earlier stage.
Change-Id: Ibf7e3f7fc2c7ad991d69c106bbb6a9dd4c7f0e79
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
tty_buffer_request_room is well protected, but while after it returns,
it releases the port->lock. tty->buf.tail might be modified
by either irq handler or other threads. The patch adds more protection
by holding the lock across tty buffer finding and buffer filling.
Signed-off-by: Alek Du <alek.du@intel.com>
Signed-off-by: Xiaobing Tu <xiaobing.tu@intel.com>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Change-Id: I7561321a1e78c9730232f98085e01fc1749a48f5
CRs-Fixed: 387308
Signed-off-by: Vamsi Krishna <vskrishn@codeaurora.org>
The GPU clock statistics show the amount of time the
GPU was busy in the last one second and the time spent
at each individual clock level while it was busy.
Change-Id: I16f8973ca0c683d55406a1f37c1395cdfe43ef5a
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Starting kernel 3.0, all USB function and transport drivers are
compiled in the kernel and user can enable the required functions/
transports using sysfs attributes. Hence, remove the unused
Kconfig option which is no longer used anywhere.
Change-Id: I9ac9e14c2dd95827f7e0fd48393a24552cd980d1
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
When the device is started with a charger inserted, it reports 0% soc.
This is because a variable "soc_at_cv" is not initialized correctly in
the probe function.
Fix this by initializing it appropriately to -EINVAL.
Change-Id: I106f36e204c5cc4f16a8f52b9fa7a2a012282e35
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Forcing to return shutdown soc for the first 30 seconds was added so
that we show consistent soc right after bootup.
However with the recent changes to the algorithm viz. using termination
resistance for UUC, restricting UUC changes at most 1% and limiting the
OCV corrections, this forcing is not required. The soc stays within
limits of the shutdown soc.
Remove this forcing of shutdown soc.
Change-Id: Ie74e9318cca29ab60436df6ddec286917fbd0cd7
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
A drop in state of charge (soc) was observed right after End Of Charge
(EOC) happens. This was because calculated soc was still low, while the
scaling algorithm increased the SOC to 100%. There was a situation
where SOC was calculated right when charging finished but charger did not
send the EOC to bms - the charging adjustments algorithm does not scale
since it sees charging is stopped and falls back to the calculated soc
which was lower than the scaled soc.
Fix this by changing the calculated OCV(open circuit voltage) of the
battery so that the calculated soc is same as the scaled soc.
Change-Id: Ieb409721da6fc70d673ccbf4334f94a1793dfe7e
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
It was observed that while charging the reported soc sometimes reaches
100% before end of charging happens. At other times it does not reach
100% at end of charge and a abrupt jump to 100% soc happens.
Fix this by linearly increasing soc based on battery charge current
after constant voltage phase is reached. Constant voltage phase is
reached when battery voltage reaches the max value.
Also once constant voltage phase is reached and the voltage or charge
current decreases keep reporting the earlier soc. This could be because
of a transient system load.
Change-Id: I14c2f42d7897041db038ce85ce1124cf1ef261af
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
commit 7dbaa46678
(ARM: 7169/1: topdown mmap support) allocates mmap addresses from
the top addresses instead of the bottom. Unfortunately, some
userspace components are broken and do checks such as the following:
void* addr = mmap(...);
// Top bit is now the sign bit...
int test = (int)addr;
if (test < 0) {
//failure
}
Which means that any address greater than 0x80000000 will be marked
as a failure. Until we verify all userspace components are fixed,
revert this change.
Change-Id: I2eacbfb4f7b8fc9bf5704ca90d31c409819d7fbe
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Add a common helper for dma-mapping core for mapping a coherent buffer
to userspace.
Change-Id: I9b67d53b50f4761455ff66634d65e6510faa62de
Reported-by: Subash Patel <subashrp@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Some USB cores have a separate IRQ line for issuing ASYNC
interrupts in LPM. This interrupt needs to be enabled only
when hardware is put in low power state.
Change-Id: Ie7de237ccbaa90294b20d3fce594ec280cb1641a
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
The RESIN bark interrupt is used for the reporting a key event.
Provide the RESIN reset configuration.
Change-Id: I5bb403bcb92b0d082e5f0382a13eb70763e69db9
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The PMIC 8941 v1.0 has a hardware bug where the RESIN line
does not generate an interrupt on key-press. The bark interrupt
can be used to provide the required functionality as follows -
Initialization:
1. Configure the bark (s1 timer) to 0ms, this generates the bark
interrupt as soon as the key is pressed.
2. Configure S2 reset timer to max 2 seconds and enable the S2 reset.
Runtime:
1. On receiving a bark interrupt report the key press, disable
reset and the bark irq. Schedule a work handler to execute after 500ms.
2. In the work, enable the reset and check the bark RT status bit.
3. If the bark RT bit is 0, report the key release and exit.
4. If bark RT bit is 1, disable the reset and re-arm the work for 500ms.
Change-Id: I6da47d27e32ada34660e36e6265f9078b2144999
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The PON device supports reset and standard-key based configurations.
Change-Id: I23f538fff32054217ed6c79d199aa0eb86f9a94d
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The PON module supports various reset sources (physical pins)
such as KPDPWR, RESIN, RESIN+KPDPWR. These pins can be configured
for different reset types (such as warm, soft, hard) and can also
be used as push buttons (keys).
In the push-button configuration these pins act as gpios, only
reporting the state on the line (high/low) and no additional
pon based configuration being done in the hardware or software.
They can be used for generic buttons (such as volume up/down,
directional keys)
Change-Id: Icde78b49b1037c1b5a13d7e90f772f72ac822b2a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The source of input signal(ADC or DMIC) needs to configured correctly
in CDC_TXn_MUX_CTL registers for correct operation of Decimators.
Currently for DMIC's, this configuration is done in DMIC DAPM widget
power up/down call back creating dependency between DMIC number and
Decimator number (with current code, DMIC1 can send signal to only
DEC1, DMIC2 can send signal to only DEC2). Remove this dependency by
setting type of input signal when Decimator MUX input is set.
CRs-Fixed: 384279
Change-Id: Ic084bb892d663dea51ca5a5a95c6bdba30453744
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
- Adds supports to send DECODER command to
decoder which inturn used to CLOSE the instance.
- Adds supports to send ENCODER command to
encoder which inturn used to CLOSE the instance.
Change-Id: Ia6037fdf66824538124f775442150b7a4ed201b8
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
When in resume or boot time, baselayer pipes need to be committed for
mdp to play, otherwize underruns and blue screens are seen. The
previous pipe stage up func has this commit which is removed now, so
the commit calls have to be added for the cases where base pipe is
initialized.
Change-Id: I63a7d0ac3fb078b3d7f604eb646a0430326a478c
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Manage the OCMEM core and branch clocks and keep them
on only when required to minimize the power impact.
Change-Id: I33339b317c1ec76af27bae56c552cb50fef3da0c
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
Camera is facing axi overflow issues for full size
modes due to unavailability of AXI bus for VFE. Update
camera driver to send AXI allocate request before starting
the camera.
Change-Id: I2b3249cd85ecf552a042cd690853eb6f4d4b346d
CRs-Fixed: 383532
Signed-off-by: Suresh Vankadara <svankada@codeaurora.org>
Fix the incorrect register shift masks used for one point
calibration read from the efused region. The order for
one point and two point calibration is swapped in the
efuse memory region. Change the driver to update the
above change made in HW.
Change-Id: Ic3382bad8336fd2f9fa6955091b941ee0bda43b1
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
The GPU MPU workaround requires the OCMEM core clock.
So refactor the workaround as a stub that can be used
with clock management support.
Change-Id: I096cdf2bf61674795befb1fbb75d5ec3faa5ed23
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
The OCMEM driver needs to request frequencies for the OCMEM core.
Add a voter clock for this driver.
Change-Id: I77a2fda10af3538d6e7b9b71fcd8d1aa5fa489b7
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
The reset bit inside the PMU may not be accessible if RIVA is in
power collapse. Therefore, don't assert the cCPU reset because
Linux may hang trying to write the PMU register. Instead, just
assert the toplevel reset that resets the entire RIVA subsystem.
Change-Id: I1f1094bc7974b3181b18c2246db5fb5a6c4ed812
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Since the wakelock was removed, an interrupt coming during the
transition to system suspend relies on pm_stay_awake() to indicate
that the controller's wakeup source is now active. However, this
depends on pm_save_wakeup_count() to be called by the process
that initiated the suspend. The forthcoming autosleep feature will
be doing this.
But until autosleep is implemented, for robustness additionally
introduce a .suspend_noirq callback which checks for pending
interrupts and returns -EBUSY if there are any, which will force
the PM core to unwind its suspend actions.
Change-Id: If286d654b667d00a0130accb7a783258901ff760
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Adds support to send frame rate to Video HW in right format.
Change-Id: Ifba83310cb88e6ec898266f9d24bb157ae63aad6
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
Add support for 3 keys connected on PM8941 GPIOs and specify the
required GPIO configuration for these keys.
The supported keys are -
camera snapshot - PM8941 GPIO 3
camera focus - PM8941 GPIO 4
volume up - PM8941 GPIO 5
Change-Id: Icdc6f31fa5055c7e9b86a541e618cd421a0dcd2a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
It was observed that the battery was charged at voltage less than the
max voltage. This was because the vdd max algorithm rounded down the
voltage.
Use voltage rounding up instead.
Change-Id: Ifb5e9c265b8f616e82abbb979ecfac5e6604b25d
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Unusable Charge(UUC) is based on battery resistance and average load. Since
battery resistance is based on temperature and state of charge, UUC
is essentially based on temperature, state of charge and the load.
The purpose of UUC is to prevent the battery from falling below the
cutoff voltage. In the current implementation, since UUC is dependent
on SOC, it is small when SOC is high and gets bigger as SOC approaches
zero. This increase however is not linear which causes huge jumps in
SOC.
Remove the dependence of UUC on SOC. Simply use the resistance value
which would have been used when SOC = 0.
To find this resistance value, loop from SOC = 0 towards 100 and at each
step calculate/interpolate open circuit voltage, resistance and the
corresponding unusable voltage. The interpolated resistance value where
unusable voltage equals open circuit voltage is the termination
resistance. Use this resistance value for calculation of UUC. Note that
this resistance value is not dependent on the current SOC and will be
constant as long as the load and temperature remain the same.
Change-Id: I3ba91f8b1cb831e257f72363058a6e3a04ffc39b
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
We see huge jumps in Unusable Charge (UUC) as temperature, average
load or state of charge (SOC) changes, which results in huge jumps
in the reported capacity.
Increase/Decrease UUC slowly (limit 1%) each time SOC is requested.
This results in linearity improvements.
Change-Id: I82022aa499a53c5ea42e7079e96d3c94dfc0be01
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
