Import T813XXU2BQD1 kernel source changes
Change-Id: I029a632786a1e30cb0067755d16b55a583c7b235
This commit is contained in:
parent
2a649dacb5
commit
d354864125
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@ -22,8 +22,6 @@
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/uaccess.h>
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#include <linux/of.h>
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#include <soc/qcom/scm.h>
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#include <soc/qcom/qseecomi.h>
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@ -53,10 +51,10 @@
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* Length of descriptive name associated with Interrupt
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*/
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#define TZBSP_MAX_INT_DESC 16
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/*
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* TZ 3.X version info
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*/
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#define QSEE_VERSION_TZ_3_X 0x800000
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#ifdef CONFIG_TIMA_GET_QSEE_LOGS_USING_RDX
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extern void set_qsee_log_address(unsigned int address);
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#endif
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/*
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* VMID Table
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*/
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@ -75,19 +73,6 @@ struct tzdbg_boot_info_t {
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uint32_t warm_jmp_addr; /* Last Warmboot Jump Address */
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uint32_t spare; /* Reserved for future use. */
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};
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/*
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* Boot Info Table for 64-bit
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*/
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struct tzdbg_boot_info64_t {
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uint32_t wb_entry_cnt; /* Warmboot entry CPU Counter */
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uint32_t wb_exit_cnt; /* Warmboot exit CPU Counter */
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uint32_t pc_entry_cnt; /* Power Collapse entry CPU Counter */
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uint32_t pc_exit_cnt; /* Power Collapse exit CPU counter */
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uint32_t psci_entry_cnt;/* PSCI syscall entry CPU Counter */
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uint32_t psci_exit_cnt; /* PSCI syscall exit CPU Counter */
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uint64_t warm_jmp_addr; /* Last Warmboot Jump Address */
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uint32_t warm_jmp_instr; /* Last Warmboot Jump Address Instruction */
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};
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/*
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* Reset Info Table
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*/
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@ -199,40 +184,6 @@ struct tzdbg_t {
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struct tzdbg_log_t ring_buffer; /* TZ Ring Buffer */
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};
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struct hypdbg_log_pos_t {
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uint16_t wrap;
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uint16_t offset;
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};
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struct hypdbg_boot_info_t {
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uint32_t warm_entry_cnt;
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uint32_t warm_exit_cnt;
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};
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struct hypdbg_t {
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/* Magic Number */
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uint32_t magic_num;
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/* Number of CPU's */
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uint32_t cpu_count;
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/* Ring Buffer Offset */
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uint32_t ring_off;
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/* Ring buffer position mgmt */
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struct hypdbg_log_pos_t log_pos;
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uint32_t log_len;
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/* S2 fault numbers */
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uint32_t s2_fault_counter;
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/* Boot Info */
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struct hypdbg_boot_info_t boot_info[TZBSP_MAX_CPU_COUNT];
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/* Ring buffer pointer */
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uint8_t log_buf_p[];
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};
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/*
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* Enumeration order for VMID's
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*/
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@ -244,8 +195,6 @@ enum tzdbg_stats_type {
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TZDBG_GENERAL,
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TZDBG_LOG,
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TZDBG_QSEE_LOG,
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TZDBG_HYP_GENERAL,
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TZDBG_HYP_LOG,
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TZDBG_STATS_MAX
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};
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@ -256,17 +205,14 @@ struct tzdbg_stat {
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struct tzdbg {
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void __iomem *virt_iobase;
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void __iomem *hyp_virt_iobase;
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struct tzdbg_t *diag_buf;
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struct hypdbg_t *hyp_diag_buf;
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char *disp_buf;
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int debug_tz[TZDBG_STATS_MAX];
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struct tzdbg_stat stat[TZDBG_STATS_MAX];
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uint32_t hyp_debug_rw_buf_size;
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bool is_hyplog_enabled;
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};
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static struct tzdbg tzdbg = {
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.stat[TZDBG_BOOT].name = "boot",
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.stat[TZDBG_RESET].name = "reset",
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.stat[TZDBG_INTERRUPT].name = "interrupt",
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@ -274,8 +220,6 @@ static struct tzdbg tzdbg = {
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.stat[TZDBG_GENERAL].name = "general",
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.stat[TZDBG_LOG].name = "log",
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.stat[TZDBG_QSEE_LOG].name = "qsee_log",
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.stat[TZDBG_HYP_GENERAL].name = "hyp_general",
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.stat[TZDBG_HYP_LOG].name = "hyp_log",
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};
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static struct tzdbg_log_t *g_qsee_log;
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@ -335,90 +279,30 @@ static int _disp_tz_boot_stats(void)
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{
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int i;
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int len = 0;
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struct tzdbg_boot_info_t *ptr = NULL;
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struct tzdbg_boot_info64_t *ptr_64 = NULL;
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int ret = 0;
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uint32_t smc_id = 0;
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uint32_t feature = 10;
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struct qseecom_command_scm_resp resp = {};
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struct scm_desc desc = {0};
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struct tzdbg_boot_info_t *ptr;
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if (!is_scm_armv8()) {
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ret = scm_call(SCM_SVC_INFO, SCM_SVC_UTIL, &feature,
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sizeof(feature), &resp, sizeof(resp));
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} else {
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smc_id = TZ_INFO_GET_FEATURE_VERSION_ID;
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desc.arginfo = TZ_INFO_GET_FEATURE_VERSION_ID_PARAM_ID;
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desc.args[0] = feature;
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ret = scm_call2(smc_id, &desc);
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resp.result = desc.ret[0];
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}
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if (ret) {
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pr_err("%s: scm_call to register log buffer failed\n",
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__func__);
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return 0;
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}
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pr_info("qsee_version = 0x%x\n", resp.result);
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if (resp.result >= QSEE_VERSION_TZ_3_X) {
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ptr_64 = (struct tzdbg_boot_info64_t *)((unsigned char *)
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tzdbg.diag_buf + tzdbg.diag_buf->boot_info_off);
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} else {
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ptr = (struct tzdbg_boot_info_t *)((unsigned char *)
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tzdbg.diag_buf + tzdbg.diag_buf->boot_info_off);
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}
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ptr = (struct tzdbg_boot_info_t *)((unsigned char *)tzdbg.diag_buf +
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tzdbg.diag_buf->boot_info_off);
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for (i = 0; i < tzdbg.diag_buf->cpu_count; i++) {
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if (resp.result >= QSEE_VERSION_TZ_3_X) {
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len += snprintf(tzdbg.disp_buf + len,
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(debug_rw_buf_size - 1) - len,
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" CPU #: %d\n"
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" Warmboot jump address : 0x%llx\n"
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" Warmboot entry CPU counter : 0x%x\n"
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" Warmboot exit CPU counter : 0x%x\n"
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" Power Collapse entry CPU counter : 0x%x\n"
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" Power Collapse exit CPU counter : 0x%x\n"
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" Psci entry CPU counter : 0x%x\n"
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" Psci exit CPU counter : 0x%x\n"
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" Warmboot Jump Address Instruction : 0x%x\n",
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i, (uint64_t)ptr_64->warm_jmp_addr,
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ptr_64->wb_entry_cnt,
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ptr_64->wb_exit_cnt,
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ptr_64->pc_entry_cnt,
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ptr_64->pc_exit_cnt,
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ptr_64->psci_entry_cnt,
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ptr_64->psci_exit_cnt,
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ptr_64->warm_jmp_instr);
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len += snprintf(tzdbg.disp_buf + len,
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(debug_rw_buf_size - 1) - len,
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" CPU #: %d\n"
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" Warmboot jump address : 0x%x\n"
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" Warmboot entry CPU counter: 0x%x\n"
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" Warmboot exit CPU counter : 0x%x\n"
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" Power Collapse entry CPU counter: 0x%x\n"
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" Power Collapse exit CPU counter : 0x%x\n",
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i, ptr->warm_jmp_addr, ptr->wb_entry_cnt,
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ptr->wb_exit_cnt, ptr->pc_entry_cnt,
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ptr->pc_exit_cnt);
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if (len > (debug_rw_buf_size - 1)) {
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pr_warn("%s: Cannot fit all info into the buffer\n",
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__func__);
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break;
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}
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ptr_64++;
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} else {
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len += snprintf(tzdbg.disp_buf + len,
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(debug_rw_buf_size - 1) - len,
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" CPU #: %d\n"
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" Warmboot jump address : 0x%x\n"
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" Warmboot entry CPU counter: 0x%x\n"
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" Warmboot exit CPU counter : 0x%x\n"
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" Power Collapse entry CPU counter: 0x%x\n"
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" Power Collapse exit CPU counter : 0x%x\n",
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i, ptr->warm_jmp_addr,
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ptr->wb_entry_cnt,
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ptr->wb_exit_cnt,
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ptr->pc_entry_cnt,
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ptr->pc_exit_cnt);
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if (len > (debug_rw_buf_size - 1)) {
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pr_warn("%s: Cannot fit all info into the buffer\n",
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__func__);
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break;
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}
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ptr++;
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if (len > (debug_rw_buf_size - 1)) {
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pr_warn("%s: Cannot fit all info into the buffer\n",
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__func__);
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break;
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}
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ptr++;
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}
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tzdbg.stat[TZDBG_BOOT].data = tzdbg.disp_buf;
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return len;
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@ -589,78 +473,6 @@ static int _disp_log_stats(struct tzdbg_log_t *log,
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return len;
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}
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static int __disp_hyp_log_stats(uint8_t *log,
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struct hypdbg_log_pos_t *log_start, uint32_t log_len,
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size_t count, uint32_t buf_idx)
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{
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struct hypdbg_t *hyp = tzdbg.hyp_diag_buf;
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unsigned long t = 0;
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uint32_t wrap_start;
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uint32_t wrap_end;
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uint32_t wrap_cnt;
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int max_len;
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int len = 0;
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int i = 0;
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wrap_start = log_start->wrap;
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wrap_end = hyp->log_pos.wrap;
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/* Calculate difference in # of buffer wrap-arounds */
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if (wrap_end >= wrap_start) {
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wrap_cnt = wrap_end - wrap_start;
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} else {
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/* wrap counter has wrapped around, invalidate start position */
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wrap_cnt = 2;
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}
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if (wrap_cnt > 1) {
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/* end position has wrapped around more than once, */
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/* current start no longer valid */
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log_start->wrap = hyp->log_pos.wrap - 1;
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log_start->offset = (hyp->log_pos.offset + 1) % log_len;
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} else if ((wrap_cnt == 1) &&
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(hyp->log_pos.offset > log_start->offset)) {
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/* end position has overwritten start */
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log_start->offset = (hyp->log_pos.offset + 1) % log_len;
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}
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while (log_start->offset == hyp->log_pos.offset) {
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/*
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* No data in ring buffer,
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* so we'll hang around until something happens
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*/
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t = msleep_interruptible(50);
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if (t != 0) {
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/* Some event woke us up, so let's quit */
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return 0;
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}
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/* TZDBG_HYP_LOG */
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memcpy_fromio((void *)tzdbg.hyp_diag_buf, tzdbg.hyp_virt_iobase,
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tzdbg.hyp_debug_rw_buf_size);
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}
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max_len = (count > tzdbg.hyp_debug_rw_buf_size) ?
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tzdbg.hyp_debug_rw_buf_size : count;
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/*
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* Read from ring buff while there is data and space in return buff
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*/
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while ((log_start->offset != hyp->log_pos.offset) && (len < max_len)) {
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tzdbg.disp_buf[i++] = log[log_start->offset];
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log_start->offset = (log_start->offset + 1) % log_len;
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if (0 == log_start->offset)
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++log_start->wrap;
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++len;
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}
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/*
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* return buffer to caller
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*/
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tzdbg.stat[buf_idx].data = tzdbg.disp_buf;
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return len;
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}
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static int _disp_tz_log_stats(size_t count)
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{
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static struct tzdbg_log_pos_t log_start = {0};
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@ -673,18 +485,6 @@ static int _disp_tz_log_stats(size_t count)
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tzdbg.diag_buf->ring_len, count, TZDBG_LOG);
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}
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static int _disp_hyp_log_stats(size_t count)
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{
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static struct hypdbg_log_pos_t log_start = {0};
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uint8_t *log_ptr;
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log_ptr = (uint8_t *)((unsigned char *)tzdbg.hyp_diag_buf +
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tzdbg.hyp_diag_buf->ring_off);
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return __disp_hyp_log_stats(log_ptr, &log_start,
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tzdbg.hyp_debug_rw_buf_size, count, TZDBG_HYP_LOG);
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}
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static int _disp_qsee_log_stats(size_t count)
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{
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static struct tzdbg_log_pos_t log_start = {0};
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@ -694,42 +494,6 @@ static int _disp_qsee_log_stats(size_t count)
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count, TZDBG_QSEE_LOG);
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}
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static int _disp_hyp_general_stats(size_t count)
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{
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int len = 0;
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int i;
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struct hypdbg_boot_info_t *ptr = NULL;
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len += snprintf((unsigned char *)tzdbg.disp_buf + len,
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tzdbg.hyp_debug_rw_buf_size - 1,
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" Magic Number : 0x%x\n"
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" CPU Count : 0x%x\n"
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" S2 Fault Counter: 0x%x\n",
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tzdbg.hyp_diag_buf->magic_num,
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tzdbg.hyp_diag_buf->cpu_count,
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tzdbg.hyp_diag_buf->s2_fault_counter);
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ptr = tzdbg.hyp_diag_buf->boot_info;
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for (i = 0; i < tzdbg.hyp_diag_buf->cpu_count; i++) {
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len += snprintf((unsigned char *)tzdbg.disp_buf + len,
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(tzdbg.hyp_debug_rw_buf_size - 1) - len,
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" CPU #: %d\n"
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" Warmboot entry CPU counter: 0x%x\n"
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" Warmboot exit CPU counter : 0x%x\n",
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i, ptr->warm_entry_cnt, ptr->warm_exit_cnt);
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if (len > (tzdbg.hyp_debug_rw_buf_size - 1)) {
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pr_warn("%s: Cannot fit all info into the buffer\n",
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__func__);
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break;
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}
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ptr++;
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}
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tzdbg.stat[TZDBG_HYP_GENERAL].data = (char *)tzdbg.disp_buf;
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return len;
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}
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static ssize_t tzdbgfs_read(struct file *file, char __user *buf,
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size_t count, loff_t *offp)
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{
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@ -738,8 +502,6 @@ static ssize_t tzdbgfs_read(struct file *file, char __user *buf,
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memcpy_fromio((void *)tzdbg.diag_buf, tzdbg.virt_iobase,
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debug_rw_buf_size);
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memcpy_fromio((void *)tzdbg.hyp_diag_buf, tzdbg.hyp_virt_iobase,
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tzdbg.hyp_debug_rw_buf_size);
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switch (*tz_id) {
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case TZDBG_BOOT:
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len = _disp_tz_boot_stats();
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@ -769,13 +531,6 @@ static ssize_t tzdbgfs_read(struct file *file, char __user *buf,
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len = _disp_qsee_log_stats(count);
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*offp = 0;
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break;
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case TZDBG_HYP_GENERAL:
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len = _disp_hyp_general_stats(count);
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break;
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case TZDBG_HYP_LOG:
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len = _disp_hyp_log_stats(count);
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*offp = 0;
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break;
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default:
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break;
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}
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@ -868,6 +623,11 @@ static void tzdbg_register_qsee_log_buf(void)
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goto err2;
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}
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#ifdef CONFIG_TIMA_GET_QSEE_LOGS_USING_RDX
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/* QSEE Logs */
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set_qsee_log_address((uint32_t)pa);
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#endif
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g_qsee_log =
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(struct tzdbg_log_t *)ion_map_kernel(g_ion_clnt, g_ihandle);
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@ -912,8 +672,7 @@ static int tzdbgfs_init(struct platform_device *pdev)
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goto err;
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}
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}
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tzdbg.disp_buf = kzalloc(max(debug_rw_buf_size,
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tzdbg.hyp_debug_rw_buf_size), GFP_KERNEL);
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tzdbg.disp_buf = kzalloc(debug_rw_buf_size, GFP_KERNEL);
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if (tzdbg.disp_buf == NULL) {
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pr_err("%s: Can't Allocate memory for tzdbg.disp_buf\n",
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__func__);
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@ -940,51 +699,8 @@ static void tzdbgfs_exit(struct platform_device *pdev)
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ion_unmap_kernel(g_ion_clnt, g_ihandle);
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ion_free(g_ion_clnt, g_ihandle);
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}
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ion_client_destroy(g_ion_clnt);
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}
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ion_client_destroy(g_ion_clnt);
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}
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static int __update_hypdbg_base(struct platform_device *pdev,
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void __iomem *virt_iobase)
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{
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phys_addr_t hypdiag_phy_iobase;
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uint32_t hyp_address_offset;
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uint32_t hyp_size_offset;
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struct hypdbg_t *hyp;
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uint32_t *ptr = NULL;
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if (of_property_read_u32((&pdev->dev)->of_node, "hyplog-address-offset",
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&hyp_address_offset)) {
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dev_err(&pdev->dev, "hyplog address offset is not defined\n");
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return -EINVAL;
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}
|
||||
if (of_property_read_u32((&pdev->dev)->of_node, "hyplog-size-offset",
|
||||
&hyp_size_offset)) {
|
||||
dev_err(&pdev->dev, "hyplog size offset is not defined\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
hypdiag_phy_iobase = readl_relaxed(virt_iobase + hyp_address_offset);
|
||||
tzdbg.hyp_debug_rw_buf_size = readl_relaxed(virt_iobase +
|
||||
hyp_size_offset);
|
||||
|
||||
tzdbg.hyp_virt_iobase = devm_ioremap_nocache(&pdev->dev,
|
||||
hypdiag_phy_iobase,
|
||||
tzdbg.hyp_debug_rw_buf_size);
|
||||
if (!tzdbg.hyp_virt_iobase) {
|
||||
dev_err(&pdev->dev, "ERROR could not ioremap: start=%pr, len=%u\n",
|
||||
&hypdiag_phy_iobase, tzdbg.hyp_debug_rw_buf_size);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
ptr = kzalloc(tzdbg.hyp_debug_rw_buf_size, GFP_KERNEL);
|
||||
if (!ptr)
|
||||
return -ENOMEM;
|
||||
|
||||
tzdbg.hyp_diag_buf = (struct hypdbg_t *)ptr;
|
||||
hyp = tzdbg.hyp_diag_buf;
|
||||
hyp->log_pos.wrap = hyp->log_pos.offset = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -996,7 +712,6 @@ static int tz_log_probe(struct platform_device *pdev)
|
|||
void __iomem *virt_iobase;
|
||||
phys_addr_t tzdiag_phy_iobase;
|
||||
uint32_t *ptr = NULL;
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
* Get address that stores the physical location diagnostic data
|
||||
|
@ -1025,24 +740,6 @@ static int tz_log_probe(struct platform_device *pdev)
|
|||
(unsigned int)(debug_rw_buf_size));
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
if (pdev->dev.of_node) {
|
||||
tzdbg.is_hyplog_enabled = of_property_read_bool(
|
||||
(&pdev->dev)->of_node, "qcom,hyplog-enabled");
|
||||
if (tzdbg.is_hyplog_enabled) {
|
||||
ret = __update_hypdbg_base(pdev, virt_iobase);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "%s() failed to get device tree data ret = %d\n",
|
||||
__func__, ret);
|
||||
return -EINVAL;
|
||||
}
|
||||
} else {
|
||||
dev_info(&pdev->dev, "Hyp log service is not supported\n");
|
||||
}
|
||||
} else {
|
||||
dev_dbg(&pdev->dev, "Device tree data is not found\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* Retrieve the address of diagnostic data
|
||||
*/
|
||||
|
@ -1085,8 +782,6 @@ err:
|
|||
static int tz_log_remove(struct platform_device *pdev)
|
||||
{
|
||||
kzfree(tzdbg.diag_buf);
|
||||
if (tzdbg.hyp_diag_buf)
|
||||
kzfree(tzdbg.hyp_diag_buf);
|
||||
tzdbgfs_exit(pdev);
|
||||
|
||||
return 0;
|
||||
|
@ -1123,4 +818,5 @@ module_exit(tz_log_exit);
|
|||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("TZ Log driver");
|
||||
MODULE_VERSION("1.1");
|
||||
MODULE_ALIAS("platform:tz_log");
|
||||
|
|
|
@ -58,8 +58,6 @@ static int32_t msm_cci_set_clk_param(struct cci_device *cci_dev,
|
|||
enum cci_i2c_master_t master = c_ctrl->cci_info->cci_i2c_master;
|
||||
enum i2c_freq_mode_t i2c_freq_mode = c_ctrl->cci_info->i2c_freq_mode;
|
||||
|
||||
clk_params = &cci_dev->cci_clk_params[i2c_freq_mode];
|
||||
|
||||
if ((i2c_freq_mode >= I2C_MAX_MODES) || (i2c_freq_mode < 0)) {
|
||||
pr_err("%s:%d invalid i2c_freq_mode = %d",
|
||||
__func__, __LINE__, i2c_freq_mode);
|
||||
|
@ -67,6 +65,8 @@ static int32_t msm_cci_set_clk_param(struct cci_device *cci_dev,
|
|||
}
|
||||
if (cci_dev->i2c_freq_mode[master] == i2c_freq_mode)
|
||||
return 0;
|
||||
|
||||
clk_params = &cci_dev->cci_clk_params[i2c_freq_mode];
|
||||
if (MASTER_0 == master) {
|
||||
msm_camera_io_w_mb(clk_params->hw_thigh << 16 |
|
||||
clk_params->hw_tlow,
|
||||
|
|
|
@ -3508,7 +3508,7 @@ static int msm8x16_wcd_codec_enable_micbias(struct snd_soc_dapm_widget *w,
|
|||
snd_soc_update_bits(codec, micb_int_reg, 0x08, 0x08);
|
||||
msm8x16_notifier_call(codec,
|
||||
WCD_EVENT_POST_MICBIAS_2_ON);
|
||||
} else if (strnstr(w->name, internal3_text, 30)) {
|
||||
} else if (strnstr(w->name, internal3_text, strlen(w->name))) {
|
||||
snd_soc_update_bits(codec, micb_int_reg, 0x01, 0x01);
|
||||
} else if (strnstr(w->name, external2_text, strlen(w->name))) {
|
||||
msm8x16_notifier_call(codec,
|
||||
|
@ -3536,7 +3536,7 @@ static int msm8x16_wcd_codec_enable_micbias(struct snd_soc_dapm_widget *w,
|
|||
} else if (strnstr(w->name, internal2_text, strlen(w->name))) {
|
||||
msm8x16_notifier_call(codec,
|
||||
WCD_EVENT_POST_MICBIAS_2_OFF);
|
||||
} else if (strnstr(w->name, internal3_text, 30)) {
|
||||
} else if (strnstr(w->name, internal3_text, strlen(w->name))) {
|
||||
snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
|
||||
} else if (strnstr(w->name, external2_text, strlen(w->name))) {
|
||||
/*
|
||||
|
|
Loading…
Reference in New Issue